The alternative would be to add a bit to the target's
InstrFlags but that seems like a waste of a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249169
91177308-0d34-0410-b5e6-
96231b3b80d8
virtual ~TargetInstrInfo();
+ static bool isGenericOpcode(unsigned Opc) {
+ return Opc <= TargetOpcode::GENERIC_OP_END;
+ }
+
/// Given a machine instruction descriptor, returns the register
/// class constraint for OpNum, or NULL.
const TargetRegisterClass *getRegClass(const MCInstrDesc &TID,
/// "zero cost" null checks in managed languages by allowing LLVM to fold
/// comparisons into existing memory operations.
FAULTING_LOAD_OP = 22,
+
+ /// BUILTIN_OP_END - This must be the last enum value in this list.
+ /// The target-specific post-isel opcode values start here.
+ GENERIC_OP_END = FAULTING_LOAD_OP,
};
} // end namespace TargetOpcode
} // end namespace llvm