help
Support for Rockchip's RK29xx SoCs.
+config ARCH_RK2928
+ bool "Rockchip RK2928"
+ select PLAT_RK
+ select CPU_V7
+ select ARM_GIC
+ select PL330
+ select MIGHT_HAVE_CACHE_L2X0
+ select ARM_ERRATA_754322
+ help
+ Support for Rockchip's RK2928 SoCs.
+
config ARCH_RK30
bool "Rockchip RK30xx"
select PLAT_RK
source "arch/arm/plat-rk/Kconfig"
source "arch/arm/mach-rk29/Kconfig"
+source "arch/arm/mach-rk2928/Kconfig"
source "arch/arm/mach-rk30/Kconfig"
source "arch/arm/mach-sa1100/Kconfig"
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RK29) := rk29
+machine-$(CONFIG_ARCH_RK2928) := rk2928
machine-$(CONFIG_ARCH_RK30) := rk30
machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
--- /dev/null
+if ARCH_RK2928
+
+choice
+ prompt "RK2928 Board Type"
+ default MACH_RK2928_SDK
+
+config MACH_RK2928_FPGA
+ bool "RK2928 FPGA board"
+
+config MACH_RK2928_SDK
+ bool "RK2928 SDK board"
+
+endchoice
+
+endif
--- /dev/null
+ zreladdr-y := 0x60408000
+params_phys-y := 0x60088000
+initrd_phys-y := 0x60800000
--- /dev/null
+#include <plat/clkdev.h>
--- /dev/null
+#include <plat/debug-macro.S>
--- /dev/null
+#include <plat/dma-pl330.h>
--- /dev/null
+#include <plat/entry-macro.S>
--- /dev/null
+#include <plat/fiq.h>
--- /dev/null
+#ifndef __MACH_HARDWARE_H
+#define __MACH_HARDWARE_H
+
+#endif
--- /dev/null
+#ifndef __MACH_MEMORY_H
+#define __MACH_MEMORY_H
+
+#include <mach/io.h>
+
+/*
+ * SRAM memory whereabouts
+ */
+#define SRAM_CODE_OFFSET (RK2928_IMEM_BASE + 0x0000)
+#define SRAM_CODE_END (RK2928_IMEM_BASE + 0x0FFF)
+#define SRAM_DATA_OFFSET (RK2928_IMEM_BASE + 0x1000)
+#define SRAM_DATA_END (RK2928_IMEM_BASE + 0x1FFF)
+
+#endif
--- /dev/null
+#ifndef __MACH_SRAM_H
+#define __MACH_SRAM_H
+
+#include <plat/sram.h>
+
+#define SRAM_LOOPS_PER_USEC 24
+#define SRAM_LOOP(loops) do { unsigned int i = (loops); if (i < 7) i = 7; barrier(); while (--i) barrier(); } while (0)
+/* delay on slow mode */
+#define sram_udelay(usecs) SRAM_LOOP((usecs)*SRAM_LOOPS_PER_USEC)
+/* delay on deep slow mode */
+#define sram_32k_udelay(usecs) SRAM_LOOP(((usecs)*SRAM_LOOPS_PER_USEC)/(24000000/32768))
+
+#endif
--- /dev/null
+#include <plat/system.h>
--- /dev/null
+#include <plat/timex.h>
--- /dev/null
+#include <plat/uncompress.h>