Add support for non-zero __builtin_return_address values on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62338 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index e39036fb5b79c63d9b23041aeab7982562197ca9..73bd4b384b5f6c17157c141eb14d2cce85a0f98e 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1466,7 +1466,7 @@ X86TargetLowering::LowerMemOpCallTo(CallSDNode *TheCall, SelectionDAG &DAG,
                       PseudoSourceValue::getStack(), LocMemOffset);
 }
 
-/// EmitTailCallLoadRetAddr - Emit a load of return adress if tail call
+/// EmitTailCallLoadRetAddr - Emit a load of return address if tail call
 /// optimization is performed and it is required.
 SDValue 
 X86TargetLowering::EmitTailCallLoadRetAddr(SelectionDAG &DAG, 
@@ -1480,8 +1480,9 @@ X86TargetLowering::EmitTailCallLoadRetAddr(SelectionDAG &DAG,
   // Adjust the Return address stack slot.
   MVT VT = getPointerTy();
   OutRetAddr = getReturnAddressFrameIndex(DAG);
+
   // Load the "old" Return address.
-  OutRetAddr = DAG.getLoad(VT, Chain,OutRetAddr, NULL, 0);
+  OutRetAddr = DAG.getLoad(VT, Chain, OutRetAddr, NULL, 0);
   return SDValue(OutRetAddr.getNode(), 1);
 }
 
@@ -1949,10 +1950,10 @@ SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) {
   MachineFunction &MF = DAG.getMachineFunction();
   X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
   int ReturnAddrIndex = FuncInfo->getRAIndex();
-  uint64_t SlotSize = TD->getPointerSize();
 
   if (ReturnAddrIndex == 0) {
     // Set up a frame object for the return address.
+    uint64_t SlotSize = TD->getPointerSize();
     ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, -SlotSize);
     FuncInfo->setRAIndex(ReturnAddrIndex);
   }
@@ -5891,11 +5892,19 @@ X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
 }
 
 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
-  // Depths > 0 not supported yet!
-  if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
-    return SDValue();
-  
-  // Just load the return address
+  unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+
+  if (Depth > 0) {
+    SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
+    SDValue Offset =
+      DAG.getConstant(TD->getPointerSize(),
+                      Subtarget->is64Bit() ? MVT::i64 : MVT::i32);
+    return DAG.getLoad(getPointerTy(), DAG.getEntryNode(),
+                       DAG.getNode(ISD::ADD, getPointerTy(), FrameAddr, Offset),
+                       NULL, 0);
+  }
+
+  // Just load the return address.
   SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
   return DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, NULL, 0);
 }

diff --git a/test/CodeGen/X86/ret-addr.ll b/test/CodeGen/X86/ret-addr.ll
new file mode 100644 (file)
index 0000000..06a10c6
--- /dev/null
+++ b/test/CodeGen/X86/ret-addr.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86 | not grep xor
+; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86-64 | not grep xor
+
+define i8* @h() nounwind readnone optsize {
+entry:
+       %0 = tail call i8* @llvm.returnaddress(i32 2)           ; <i8*> [#uses=1]
+       ret i8* %0
+}
+
+declare i8* @llvm.returnaddress(i32) nounwind readnone
+
+define i8* @g() nounwind readnone optsize {
+entry:
+       %0 = tail call i8* @llvm.returnaddress(i32 1)           ; <i8*> [#uses=1]
+       ret i8* %0
+}
+
+define i8* @f() nounwind readnone optsize {
+entry:
+       %0 = tail call i8* @llvm.returnaddress(i32 0)           ; <i8*> [#uses=1]
+       ret i8* %0
+}