Changed code to ignore Phi Nodes in PhyRegAlloc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1253 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
index 8e4530c15d4a5cc1dd61094da44596a2b3274554..bc825657344bde7af85a915bb8a89a5f9895d1e0 100644 (file)
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
@@ -355,6 +355,11 @@ void PhyRegAlloc::updateMachineCode()
       
       MachineInstr *MInst = *MInstIterator; 
 
+      // do not process Phis
+      if( (TM.getInstrInfo()).isPhi( MInst->getOpCode()) )
+       continue;
+
+
       // if this machine instr is call, insert caller saving code
 
       if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
@@ -579,7 +584,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
   }  // if !DEF
 
   cerr << "\nFor Inst " << *MInst;
-  cerr << "\n - SPILLED LR:"; LR->printSet();
+  cerr << " - SPILLED LR: "; LR->printSet();
   cerr << "\n - Added Instructions:";
   if( MIBef ) cerr <<  *MIBef;
   cerr <<  *AdIMid;

diff --git a/lib/CodeGen/RegAlloc/RegClass.cpp b/lib/CodeGen/RegAlloc/RegClass.cpp
index 1219147ab2f32d3f81efae91e41098046a711701..d0f1c444300169bd0c16ddd046ac6f9d577ee437 100644 (file)
--- a/lib/CodeGen/RegAlloc/RegClass.cpp
+++ b/lib/CodeGen/RegAlloc/RegClass.cpp
@@ -82,6 +82,8 @@ void RegClass::pushAllIGNodes()
     // now push NON-constrined ones, if any
     NeedMoreSpills = ! pushUnconstrainedIGNodes(); 
 
+    cerr << "\nConstrained IG Node found !@!" <<  IGNodeSpill->getIndex();
+
   } while( NeedMoreSpills );            // repeat until we have pushed all 
 
 }

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 8e4530c15d4a5cc1dd61094da44596a2b3274554..bc825657344bde7af85a915bb8a89a5f9895d1e0 100644 (file)
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -355,6 +355,11 @@ void PhyRegAlloc::updateMachineCode()
       
       MachineInstr *MInst = *MInstIterator; 
 
+      // do not process Phis
+      if( (TM.getInstrInfo()).isPhi( MInst->getOpCode()) )
+       continue;
+
+
       // if this machine instr is call, insert caller saving code
 
       if( (TM.getInstrInfo()).isCall( MInst->getOpCode()) )
@@ -579,7 +584,7 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
   }  // if !DEF
 
   cerr << "\nFor Inst " << *MInst;
-  cerr << "\n - SPILLED LR:"; LR->printSet();
+  cerr << " - SPILLED LR: "; LR->printSet();
   cerr << "\n - Added Instructions:";
   if( MIBef ) cerr <<  *MIBef;
   cerr <<  *AdIMid;

diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.cpp b/lib/Target/SparcV9/RegAlloc/RegClass.cpp
index 1219147ab2f32d3f81efae91e41098046a711701..d0f1c444300169bd0c16ddd046ac6f9d577ee437 100644 (file)
--- a/lib/Target/SparcV9/RegAlloc/RegClass.cpp
+++ b/lib/Target/SparcV9/RegAlloc/RegClass.cpp
@@ -82,6 +82,8 @@ void RegClass::pushAllIGNodes()
     // now push NON-constrined ones, if any
     NeedMoreSpills = ! pushUnconstrainedIGNodes(); 
 
+    cerr << "\nConstrained IG Node found !@!" <<  IGNodeSpill->getIndex();
+
   } while( NeedMoreSpills );            // repeat until we have pushed all 
 
 }