dmaengine: ste_dma40: Assign memcpy channels in the driver
authorLee Jones <lee.jones@linaro.org>
Fri, 3 May 2013 14:31:53 +0000 (15:31 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 23 May 2013 19:10:44 +0000 (21:10 +0200)
The channels reserved for memcpy are the same for all currently
supported platforms. With this in mind, we can ease the platform
data passing requirement by moving these assignments out from
platform code and place them directly into the driver.

Acked-by: Vinod Koul <vnod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/mach-ux500/devices-db8500.c
drivers/dma/ste_dma40.c
include/linux/platform_data/dma-ste-dma40.h

index 1cf94ce0feecd97d90fa5b3d1d85f40a114b9c3e..159855fae55be12e503d97446645f7f53e383da7 100644 (file)
@@ -146,22 +146,10 @@ static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
        [DB8500_DMA_DEV48_CAC1_RX] = U8500_CRYP1_BASE + CRYP1_RX_REG_OFFSET,
 };
 
-/* Reserved event lines for memcpy only */
-static int dma40_memcpy_event[] = {
-       DB8500_DMA_MEMCPY_TX_0,
-       DB8500_DMA_MEMCPY_TX_1,
-       DB8500_DMA_MEMCPY_TX_2,
-       DB8500_DMA_MEMCPY_TX_3,
-       DB8500_DMA_MEMCPY_TX_4,
-       DB8500_DMA_MEMCPY_TX_5,
-};
-
 static struct stedma40_platform_data dma40_plat_data = {
        .dev_len = DB8500_DMA_NR_DEV,
        .dev_rx = dma40_rx_map,
        .dev_tx = dma40_tx_map,
-       .memcpy = dma40_memcpy_event,
-       .memcpy_len = ARRAY_SIZE(dma40_memcpy_event),
        .memcpy_conf_phy = &dma40_memcpy_conf_phy,
        .memcpy_conf_log = &dma40_memcpy_conf_log,
        .disabled_channels = {-1},
index 1734feec47b13bd7e7d1370003035416cb2e3e70..12de79e84b15b07f4a4db56bc77613ec462793ee 100644 (file)
@@ -55,6 +55,9 @@
 
 #define MAX(a, b) (((a) < (b)) ? (b) : (a))
 
+/* Reserved event lines for memcpy only. */
+static int dma40_memcpy_channels[] = { 56, 57, 58, 59, 60 };
+
 /**
  * enum 40_command - The different commands and/or statuses.
  *
@@ -2014,8 +2017,7 @@ static int d40_config_memcpy(struct d40_chan *d40c)
        if (dma_has_cap(DMA_MEMCPY, cap) && !dma_has_cap(DMA_SLAVE, cap)) {
                d40c->dma_cfg = *d40c->base->plat_data->memcpy_conf_log;
                d40c->dma_cfg.src_dev_type = STEDMA40_DEV_SRC_MEMORY;
-               d40c->dma_cfg.dst_dev_type = d40c->base->plat_data->
-                       memcpy[d40c->chan.chan_id];
+               d40c->dma_cfg.dst_dev_type = dma40_memcpy_channels[d40c->chan.chan_id];
 
        } else if (dma_has_cap(DMA_MEMCPY, cap) &&
                   dma_has_cap(DMA_SLAVE, cap)) {
@@ -2927,7 +2929,7 @@ static int __init d40_dmaengine_init(struct d40_base *base,
        }
 
        d40_chan_init(base, &base->dma_memcpy, base->log_chans,
-                     base->num_log_chans, base->plat_data->memcpy_len);
+                     base->num_log_chans, ARRAY_SIZE(dma40_memcpy_channels));
 
        dma_cap_zero(base->dma_memcpy.cap_mask);
        dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask);
@@ -3215,7 +3217,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
                        num_log_chans++;
 
        base = kzalloc(ALIGN(sizeof(struct d40_base), 4) +
-                      (num_phy_chans + num_log_chans + plat_data->memcpy_len) *
+                      (num_phy_chans + num_log_chans + ARRAY_SIZE(dma40_memcpy_channels)) *
                       sizeof(struct d40_chan), GFP_KERNEL);
 
        if (base == NULL) {
@@ -3276,7 +3278,7 @@ static struct d40_base * __init d40_hw_detect_init(struct platform_device *pdev)
        if (!base->lookup_phy_chans)
                goto failure;
 
-       if (num_log_chans + plat_data->memcpy_len) {
+       if (num_log_chans + ARRAY_SIZE(dma40_memcpy_channels)) {
                /*
                 * The max number of logical channels are event lines for all
                 * src devices and dst devices
index 4b781014b0a0c510e02b6bd3d365f68e766e5188..a8087843a99b0730aa49f511faf641b119528931 100644 (file)
@@ -141,8 +141,6 @@ struct stedma40_chan_cfg {
  * @dev_len: length of dev_tx and dev_rx
  * @dev_tx: mapping between destination event line and io address
  * @dev_rx: mapping between source event line and io address
- * @memcpy: list of memcpy event lines
- * @memcpy_len: length of memcpy
  * @memcpy_conf_phy: default configuration of physical channel memcpy
  * @memcpy_conf_log: default configuration of logical channel memcpy
  * @disabled_channels: A vector, ending with -1, that marks physical channels
@@ -162,8 +160,6 @@ struct stedma40_platform_data {
        u32                              dev_len;
        const dma_addr_t                *dev_tx;
        const dma_addr_t                *dev_rx;
-       int                             *memcpy;
-       u32                              memcpy_len;
        struct stedma40_chan_cfg        *memcpy_conf_phy;
        struct stedma40_chan_cfg        *memcpy_conf_log;
        int                              disabled_channels[STEDMA40_MAX_PHYS];