ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros
authorDave Martin <dave.martin@linaro.org>
Thu, 23 Jun 2011 16:07:40 +0000 (17:07 +0100)
committerDave Martin <dave.martin@linaro.org>
Thu, 7 Jul 2011 14:30:35 +0000 (15:30 +0100)
This patch adds some generic macros to reduce boilerplate when
declaring certain common structures in arch/arm/mm/*.S

Thanks to Russell King for outlining what the
define_processor_functions macro could look like.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
arch/arm/mm/proc-macros.S

index 34261f9486b9236e96804820ee7e83dff4c7151e..4ae9b4407074b4e8679833e48294889c7bd205de 100644 (file)
        mcr     p15, 0, r0, c7, c10, 1          @ clean L1 D line
        mcr     p15, 0, ip, c7, c10, 4          @ data write barrier
        .endm
+
+.macro define_processor_functions name:req, dabort:req, pabort:req, nommu=0, suspend=0
+       .type   \name\()_processor_functions, #object
+       .align 2
+ENTRY(\name\()_processor_functions)
+       .word   \dabort
+       .word   \pabort
+       .word   cpu_\name\()_proc_init
+       .word   cpu_\name\()_proc_fin
+       .word   cpu_\name\()_reset
+       .word   cpu_\name\()_do_idle
+       .word   cpu_\name\()_dcache_clean_area
+       .word   cpu_\name\()_switch_mm
+
+       .if \nommu
+       .word   0
+       .else
+       .word   cpu_\name\()_set_pte_ext
+       .endif
+
+       .if \suspend
+       .word   cpu_\name\()_suspend_size
+       .word   cpu_\name\()_do_suspend
+       .word   cpu_\name\()_do_resume
+       .else
+       .word   0
+       .word   0
+       .word   0
+       .endif
+
+       .size   \name\()_processor_functions, . - \name\()_processor_functions
+.endm
+
+.macro define_cache_functions name:req
+       .align 2
+       .type   \name\()_cache_fns, #object
+ENTRY(\name\()_cache_fns)
+       .long   \name\()_flush_icache_all
+       .long   \name\()_flush_kern_cache_all
+       .long   \name\()_flush_user_cache_all
+       .long   \name\()_flush_user_cache_range
+       .long   \name\()_coherent_kern_range
+       .long   \name\()_coherent_user_range
+       .long   \name\()_flush_kern_dcache_area
+       .long   \name\()_dma_map_area
+       .long   \name\()_dma_unmap_area
+       .long   \name\()_dma_flush_range
+       .size   \name\()_cache_fns, . - \name\()_cache_fns
+.endm
+
+.macro define_tlb_functions name:req, flags_up:req, flags_smp
+       .type   \name\()_tlb_fns, #object
+ENTRY(\name\()_tlb_fns)
+       .long   \name\()_flush_user_tlb_range
+       .long   \name\()_flush_kern_tlb_range
+       .ifnb \flags_smp
+               ALT_SMP(.long   \flags_smp )
+               ALT_UP(.long    \flags_up )
+       .else
+               .long   \flags_up
+       .endif
+       .size   \name\()_tlb_fns, . - \name\()_tlb_fns
+.endm