ARM64: dts: rockchip: add rkvpu & vpu node in rk3399 android next dtsi

Change-Id: I8151e5dbc428c6a0eb2bcdba5edb193ca304249c
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
index 5d9f322e0c74d799cd1c203e55a68711f5f7fbb0..dab45c1d53d5f34a6008cd1f9cb9c8ed18d491d3 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android-next.dtsi
@@ -135,6 +135,63 @@
                };
        };
 
+       vpu: vpu_service@ff650000 {
+               compatible = "rockchip,vpu_service";
+               rockchip,grf = <&grf>;
+               iommus = <&vpu_mmu>;
+               reg = <0x0 0xff650000 0x0 0x800>;
+               interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>,
+                       <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "irq_dec", "irq_enc";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk_vcodec", "hclk_vcodec";
+               resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>;
+               reset-names = "video_h", "video_a";
+               power-domains = <&power RK3399_PD_VCODEC>;
+               name = "vpu_service";
+               dev_mode = <0>;
+               /* 0 means ion, 1 means drm */
+               allocator = <1>;
+               status = "disabled";
+       };
+
+       vpu_mmu: iommu@ff650800 {
+               dbgname = "vpu";
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff650800 0x0 0x40>;
+               interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vpu_mmu";
+               #iommu-cells = <0>;
+       };
+
+       rkvdec: rkvdec@ff660000 {
+               compatible = "rockchip,rkvdec";
+               rockchip,grf = <&grf>;
+               iommus = <&vdec_mmu>;
+               reg = <0x0 0xff660000 0x0 0x400>;
+               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "irq_dec";
+               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,<&cru SCLK_VDU_CA>,<&cru SCLK_VDU_CORE>;
+               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_cabac", "clk_core";
+               resets = <&cru SRST_H_VDU>, <&cru SRST_A_VDU>;
+               reset-names = "video_h", "video_a";
+               power-domains = <&power RK3399_PD_VDU>;
+               dev_mode = <2>;
+               name = "rkvdec";
+               /* 0 means ion, 1 means drm */
+               allocator = <1>;
+               status = "disabled";
+       };
+
+       vdec_mmu: iommu@ff660480 {
+               dbgname = "vdec";
+               compatible = "rockchip,iommu";
+               reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "vdec_mmu";
+               #iommu-cells = <0>;
+       };
+
        isp0: isp@ff910000 {
                compatible = "rockchip,rk3399-isp", "rockchip,isp";
                reg = <0x0 0xff910000 0x0 0x4000>;