FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
const std::string &Banner ="");
+ /// MachineLoopInfo pass - This pass is a loop analysis pass.
+ ///
+ extern const PassInfo *MachineLoopInfoID;
+
+ /// MachineDominators pass - This pass is a machine dominators analysis pass.
+ ///
+ extern const PassInfo *MachineDominatorsID;
+
/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is the
/// desired input for some register allocators. This pass is "required" by
void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
AU.addRequired<LiveVariables>();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
AU.addRequiredID(PHIEliminationID);
AU.addRequiredID(TwoAddressInstructionPassID);
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class DomTreeNodeBase<MachineBasicBlock>);
TEMPLATE_INSTANTIATION(class DominatorTreeBase<MachineBasicBlock>);
-char MachineDominatorTree::ID = 0;
-static RegisterPass<MachineDominatorTree>
-E("machinedomtree", "MachineDominator Tree Construction", true);
+namespace {
+ char MachineDominatorTree::ID = 0;
+ RegisterPass<MachineDominatorTree>
+ E("machinedomtree", "MachineDominator Tree Construction", true);
+}
+
+const PassInfo *llvm::MachineDominatorsID = E.getPassInfo();
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/Passes.h"
using namespace llvm;
TEMPLATE_INSTANTIATION(class LoopBase<MachineBasicBlock>);
TEMPLATE_INSTANTIATION(class LoopInfoBase<MachineBasicBlock>);
-char MachineLoopInfo::ID = 0;
-static RegisterPass<MachineLoopInfo>
-X("machine-loops", "Machine Natural Loop Construction", true);
+namespace {
+ char MachineLoopInfo::ID = 0;
+ RegisterPass<MachineLoopInfo>
+ X("machine-loops", "Machine Natural Loop Construction", true);
+}
+
+const PassInfo *llvm::MachineLoopInfoID = X.getPassInfo();
bool MachineLoopInfo::runOnMachineFunction(MachineFunction &) {
releaseMemory();
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveVariables>();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
// to coalescing and which analyses coalescing invalidates.
AU.addRequiredTransitive<RegisterCoalescer>();
AU.addRequired<MachineLoopInfo>();
+ AU.addPreserved<MachineLoopInfo>();
+ AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveIntervals>();
+ AU.addPreserved<MachineLoopInfo>();
+ AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
AU.addPreservedID(TwoAddressInstructionPassID);
AU.addRequired<LiveVariables>();
void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveVariables>();
AU.addPreserved<LiveVariables>();
+ AU.addPreservedID(MachineLoopInfoID);
+ AU.addPreservedID(MachineDominatorsID);
AU.addPreservedID(PHIEliminationID);
MachineFunctionPass::getAnalysisUsage(AU);
}