arm64: dts: mt8173: Add subsystem clock controller device nodes
authorJames Liao <jamesjj.liao@mediatek.com>
Mon, 10 Aug 2015 09:50:28 +0000 (17:50 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Wed, 14 Oct 2015 13:24:16 +0000 (15:24 +0200)
This patch adds device nodes providing subsystem clocks on MT8173,
includes mmsys, imgsys, vdecsys, vencsys and vencltsys.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8173.dtsi

index 4bce1676fbd1687469322965e8ce7a152ed3550f..42540b208a8f6e1318096426ed8b651963d029fa 100644 (file)
                clock-output-names = "clk32k";
        };
 
+       cpum_ck: oscillator@2 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+               clock-output-names = "cpum_ck";
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupt-parent = <&gic>;
                        clock-names = "source", "hclk";
                        status = "disabled";
                };
+
+               mmsys: clock-controller@14000000 {
+                       compatible = "mediatek,mt8173-mmsys", "syscon";
+                       reg = <0 0x14000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               imgsys: clock-controller@15000000 {
+                       compatible = "mediatek,mt8173-imgsys", "syscon";
+                       reg = <0 0x15000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vdecsys: clock-controller@16000000 {
+                       compatible = "mediatek,mt8173-vdecsys", "syscon";
+                       reg = <0 0x16000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vencsys: clock-controller@18000000 {
+                       compatible = "mediatek,mt8173-vencsys", "syscon";
+                       reg = <0 0x18000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vencltsys: clock-controller@19000000 {
+                       compatible = "mediatek,mt8173-vencltsys", "syscon";
+                       reg = <0 0x19000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
        };
 };