Add new function MachineInstrInfo::CreateZeroExtensionInstructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3582 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h
index 6a0ff0a85eab362e2d2d51627100fb7982a593a1..855840caf7f84ecf48dd84b92ad4b25c8adbc0d8 100644 (file)
--- a/include/llvm/Target/MachineInstrInfo.h
+++ b/include/llvm/Target/MachineInstrInfo.h
@@ -299,15 +299,31 @@ public:
 
   // Create instruction sequence to produce a sign-extended register value
   // from an arbitrary sized value (sized in bits, not bytes).
+  // The generated instructions are appended to `mvec'.
+  // Any temp. registers (TmpInstruction) created are recorded in mcfi.
   // Any stack space required is allocated via mcff.
   // 
   virtual void CreateSignExtensionInstructions(const TargetMachine& target,
                                        Function* F,
-                                       Value* unsignedSrcVal,
+                                       Value* srcVal,
                                        unsigned int srcSizeInBits,
                                        Value* dest,
                                        std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi)const=0;
+                                       MachineCodeForInstruction& mcfi) const=0;
+
+  // Create instruction sequence to produce a zero-extended register value
+  // from an arbitrary sized value (sized in bits, not bytes).
+  // The generated instructions are appended to `mvec'.
+  // Any temp. registers (TmpInstruction) created are recorded in mcfi.
+  // Any stack space required is allocated via mcff.
+  // 
+  virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
+                                       Function* F,
+                                       Value* srcVal,
+                                       unsigned int srcSizeInBits,
+                                       Value* dest,
+                                       std::vector<MachineInstr*>& mvec,
+                                       MachineCodeForInstruction& mcfi) const=0;
 };
 
 #endif

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 6a0ff0a85eab362e2d2d51627100fb7982a593a1..855840caf7f84ecf48dd84b92ad4b25c8adbc0d8 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -299,15 +299,31 @@ public:
 
   // Create instruction sequence to produce a sign-extended register value
   // from an arbitrary sized value (sized in bits, not bytes).
+  // The generated instructions are appended to `mvec'.
+  // Any temp. registers (TmpInstruction) created are recorded in mcfi.
   // Any stack space required is allocated via mcff.
   // 
   virtual void CreateSignExtensionInstructions(const TargetMachine& target,
                                        Function* F,
-                                       Value* unsignedSrcVal,
+                                       Value* srcVal,
                                        unsigned int srcSizeInBits,
                                        Value* dest,
                                        std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi)const=0;
+                                       MachineCodeForInstruction& mcfi) const=0;
+
+  // Create instruction sequence to produce a zero-extended register value
+  // from an arbitrary sized value (sized in bits, not bytes).
+  // The generated instructions are appended to `mvec'.
+  // Any temp. registers (TmpInstruction) created are recorded in mcfi.
+  // Any stack space required is allocated via mcff.
+  // 
+  virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
+                                       Function* F,
+                                       Value* srcVal,
+                                       unsigned int srcSizeInBits,
+                                       Value* dest,
+                                       std::vector<MachineInstr*>& mvec,
+                                       MachineCodeForInstruction& mcfi) const=0;
 };
 
 #endif