PCI: rockchip: fix wrong clr for phy interrupt

We probably didn't notice this as we still use
evb-rev1 to test our SSD with PCIe on which
the client interrput is broken actually.

Change-Id: I70e2644b9017cc5cd1b7445efb24fa69e22e0901
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 1671d02036464ee1930a42f014d46e3479f72359..b2fea33a3408480e4c786ef92c5c7d7583b3f64d 100644 (file)
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -677,9 +677,9 @@ static irqreturn_t rockchip_pcie_client_irq_handler(int irq, void *arg)
                              PCIE_CLIENT_INT_MSG | PCIE_CLIENT_INT_HOT_RST |
                              PCIE_CLIENT_INT_DPA | PCIE_CLIENT_INT_FATAL_ERR |
                              PCIE_CLIENT_INT_NFATAL_ERR |
-                             PCIE_CLIENT_INT_CORR_ERR),
-                             PCIE_CLIENT_INT_STATUS |
-                             PCIE_CLIENT_INT_PHY);
+                             PCIE_CLIENT_INT_CORR_ERR |
+                             PCIE_CLIENT_INT_PHY),
+                             PCIE_CLIENT_INT_STATUS);
        return IRQ_HANDLED;
 }