The patch fixes the warring when rk3399-vr resume:
CPU4: found redistributor 100 region 0:0x00000000fef80000
CPU4: update cpu_capacity 1024
CPU4: Booted secondary processor [
410fd082]
rk3x-i2c
ff3c0000.i2c: timeout, ipd: 0x10, state: 1
rk3x-i2c
ff3c0000.i2c: timeout, ipd: 0x10, state: 1
rk3x-i2c
ff3c0000.i2c: timeout, ipd: 0x10, state: 1
cpu cpu4: _set_opp_voltage:
failed to set voltage (800000 800000 800000 mV): -110
cpu cpu4: failed to set volt 800000
CPU4 is up
Detected PIPT I-cache on CPU5
CPU5: found redistributor 101 region 0:0x00000000fefa0000
CPU5: update cpu_capacity 1024
CPU5: Booted secondary processor [
410fd082]
CPU5 is up
Change-Id: I36f1b5d23c8d2436e20765d699dfde9eb8cf74fa
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
unsigned int num_clusters;
struct cluster_info *cluster;
struct notifier_block cpufreq_notify;
+ unsigned int check_done[MAX_CLUSTERS];
};
#define notifier_to_avs(_n) container_of(_n, struct rockchip_cpu_avs, \
rockchip_leakage_adjust_table(cpu_dev, policy->freq_table, cluster);
next:
- ret = dev_pm_opp_check_initial_rate(cpu_dev, &cur_freq);
- if (!ret)
- policy->cur = cur_freq / 1000;
+ if (avs->check_done[id] == 0) {
+ ret = dev_pm_opp_check_initial_rate(cpu_dev, &cur_freq);
+ if (!ret)
+ policy->cur = cur_freq / 1000;
+ avs->check_done[id] = 1;
+ }
out: