ixgbe: remove unnecessary duplication of PCIe bandwidth display
authorJacob Keller <jacob.e.keller@intel.com>
Fri, 18 Oct 2013 05:09:24 +0000 (05:09 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Tue, 29 Oct 2013 10:45:57 +0000 (03:45 -0700)
This patch removes the unnecessary display of PCIe bandwidth twice. Since the
ixgbe_check_minimum_link does a better job, and ensures accurate detection on
even complex chains, this older check is no longer necessary.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

index 9753c8a07e8d32116861b57f16cb10f746f35569..a7d1a1c43f129d75ee5ae9fdbddc668f21830ef9 100644 (file)
@@ -7752,29 +7752,6 @@ skip_sriov:
        if (ixgbe_pcie_from_parent(hw))
                ixgbe_get_parent_bus_info(adapter);
 
-       /* print bus type/speed/width info */
-       e_dev_info("(PCI Express:%s:%s) %pM\n",
-                  (hw->bus.speed == ixgbe_bus_speed_8000 ? "8.0GT/s" :
-                   hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
-                   hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
-                   "Unknown"),
-                  (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
-                   hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
-                   hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
-                   "Unknown"),
-                  netdev->dev_addr);
-
-       err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
-       if (err)
-               strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
-       if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
-               e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
-                          hw->mac.type, hw->phy.type, hw->phy.sfp_type,
-                          part_str);
-       else
-               e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
-                          hw->mac.type, hw->phy.type, part_str);
-
        /* calculate the expected PCIe bandwidth required for optimal
         * performance. Note that some older parts will never have enough
         * bandwidth due to being older generation PCIe parts. We clamp these
@@ -7790,6 +7767,19 @@ skip_sriov:
        }
        ixgbe_check_minimum_link(adapter, expected_gts);
 
+       err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
+       if (err)
+               strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
+       if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
+               e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
+                          hw->mac.type, hw->phy.type, hw->phy.sfp_type,
+                          part_str);
+       else
+               e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
+                          hw->mac.type, hw->phy.type, part_str);
+
+       e_dev_info("%pM\n", netdev->dev_addr);
+
        /* reset the hardware with the new settings */
        err = hw->mac.ops.start_hw(hw);
        if (err == IXGBE_ERR_EEPROM_VERSION) {