#include "llvm/CodeGen/PhyRegAlloc.h"
+//----------------------------------------------------------------------------
+//
+//----------------------------------------------------------------------------
+
+
+//----------------------------------------------------------------------------
+// Constructor: Init local composite objects and create register classes.
+//----------------------------------------------------------------------------
PhyRegAlloc::PhyRegAlloc(const Method *const M,
const TargetMachine& tm,
MethodLiveVarInfo *const Lvi)
}
-
-
-
-
+//----------------------------------------------------------------------------
+// This method initally creates interference graphs (one in each reg class)
+// and IGNodeList (one in each IG). The actual nodes will be pushed later.
+//----------------------------------------------------------------------------
void PhyRegAlloc::createIGNodeListsAndIGs()
{
-
+//----------------------------------------------------------------------------
+// This method will add all interferences at for a given instruction.
// Interence occurs only if the LR of Def (Inst or Arg) is of the same reg
// class as that of live var. The live var passed to this function is the
// LVset AFTER the instruction
-
+//----------------------------------------------------------------------------
void PhyRegAlloc::addInterference(const Value *const Def,
const LiveVarSet *const LVSet,
}
-
+//----------------------------------------------------------------------------
+// This method will walk thru code and create interferences in the IG of
+// each RegClass.
+//----------------------------------------------------------------------------
void PhyRegAlloc::buildInterferenceGraphs()
{
+//----------------------------------------------------------------------------
+// This method will add interferences for incoming arguments to a method.
+//----------------------------------------------------------------------------
void PhyRegAlloc::addInterferencesForArgs()
{
// get the InSet of root BB
}
+//----------------------------------------------------------------------------
+// This method is called after register allocation is complete to set the
+// allocated reisters in the machine code. This code will add register numbers
+// to MachineOperands that contain a Value.
+//----------------------------------------------------------------------------
void PhyRegAlloc::updateMachineCode()
{
// delete this condition checking later (must assert if Val is null)
if( !Val ) {
cout << "Error: NULL Value found in instr." << endl;
+ Op.setRegForValue( 10000 ); // an invalid value is set
continue;
}
assert( Val && "Value is NULL");
+//----------------------------------------------------------------------------
+// This method prints the code with registers after register allocation is
+// complete.
+//----------------------------------------------------------------------------
void PhyRegAlloc::printMachineCode()
{
MachineOperand& Op = MInst->getOperand(OpNum);
if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
- Op.getOperandType() == MachineOperand::MO_CCRegister) {
+ Op.getOperandType() == MachineOperand::MO_CCRegister ||
+ Op.getOperandType() == MachineOperand::MO_MachineRegister ) {
- const Value *const Val = Op.getVRegValue();
+ const int RegNum = Op.getAllocatedRegNum();
- if( !Val ) {
+ // ****this code is temporary till NULL Values are fixed
+ if( RegNum == 10000) {
cout << "\t<*NULL Value*>";
continue;
}
- assert( Val && "Value is NULL");
-
- const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
-
- if ( !LR ) {
-
-
- if( ! ( (Val->getType())->isLabelType() ||
- (Val->getValueType() == Value::ConstantVal) ) ) {
- cout << "\t" << "<*No LiveRange for: ";
- printValue( Val); cout << "*>";
- }
-
-
- //assert( LR && "No LR found for Value");
- continue;
- }
-
- unsigned RCID = (LR->getRegClass())->getID();
-
- //cout << "Setting reg for value: "; printValue( Val );
- //cout << endl;
-
- Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
-
- int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
- cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
+ cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum);
- }
- else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
- cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
- }
+ }
else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
const Value *const Val = Op.getVRegValue () ;
if( !Val ) {
else
cout << "\t" << Op; // use dump field
-
}
}
for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[ rc ]->colorAllRegs();
- //updateMachineCode();
+ updateMachineCode();
PrintMachineInstructions(Meth);
printMachineCode(); // only for DEBUGGING
}
+#if 0
+
+void PhyRegAlloc::printMachineCode()
+{
+
+ cout << endl << ";************** Method ";
+ cout << Meth->getName() << " *****************" << endl;
+
+ Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
+
+ for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
+
+ cout << endl ; printLabel( *BBI); cout << ": ";
+
+ // get the iterator for machine instructions
+ MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
+ MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
+
+ // iterate over all the machine instructions in BB
+ for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
+
+ MachineInstr *const MInst = *MInstIterator;
+
+
+ cout << endl << "\t";
+ cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
+
+
+ //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
+
+ for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
+
+ MachineOperand& Op = MInst->getOperand(OpNum);
+
+ if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
+ Op.getOperandType() == MachineOperand::MO_CCRegister) {
+
+ const Value *const Val = Op.getVRegValue();
+
+ if( !Val ) {
+ cout << "\t<*NULL Value*>";
+ continue;
+ }
+ assert( Val && "Value is NULL");
+
+ const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
+
+ if ( !LR ) {
+
+
+ if( ! ( (Val->getType())->isLabelType() ||
+ (Val->getValueType() == Value::ConstantVal) ) ) {
+ cout << "\t" << "<*No LiveRange for: ";
+ printValue( Val); cout << "*>";
+ }
+
+
+ //assert( LR && "No LR found for Value");
+ continue;
+ }
+
+ unsigned RCID = (LR->getRegClass())->getID();
+
+ //cout << "Setting reg for value: "; printValue( Val );
+ //cout << endl;
+
+ Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
+
+ int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
+
+ cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
+
+ }
+ else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
+ cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
+ }
+ else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
+ const Value *const Val = Op.getVRegValue () ;
+ if( !Val ) {
+ cout << "\t<*NULL Value*>";
+ continue;
+ }
+ if( (Val->getValueType() == Value::BasicBlockVal))
+ { cout << "\t"; printLabel( Op.getVRegValue () ); }
+ else { cout << "\t"; printValue( Val ); }
+ }
+
+ else
+ cout << "\t" << Op; // use dump field
+
+ }
+
+ }
+
+ cout << endl;
+
+ }
+
+ cout << endl;
+}
+
+void PhyRegAlloc::printLabel(const Value *const Val)
+{
+ if( Val->hasName() )
+ cout << Val->getName();
+ else
+ cout << "Label" << Val;
+}
+
+#endif
#include "llvm/CodeGen/PhyRegAlloc.h"
+//----------------------------------------------------------------------------
+//
+//----------------------------------------------------------------------------
+
+
+//----------------------------------------------------------------------------
+// Constructor: Init local composite objects and create register classes.
+//----------------------------------------------------------------------------
PhyRegAlloc::PhyRegAlloc(const Method *const M,
const TargetMachine& tm,
MethodLiveVarInfo *const Lvi)
}
-
-
-
-
+//----------------------------------------------------------------------------
+// This method initally creates interference graphs (one in each reg class)
+// and IGNodeList (one in each IG). The actual nodes will be pushed later.
+//----------------------------------------------------------------------------
void PhyRegAlloc::createIGNodeListsAndIGs()
{
-
+//----------------------------------------------------------------------------
+// This method will add all interferences at for a given instruction.
// Interence occurs only if the LR of Def (Inst or Arg) is of the same reg
// class as that of live var. The live var passed to this function is the
// LVset AFTER the instruction
-
+//----------------------------------------------------------------------------
void PhyRegAlloc::addInterference(const Value *const Def,
const LiveVarSet *const LVSet,
}
-
+//----------------------------------------------------------------------------
+// This method will walk thru code and create interferences in the IG of
+// each RegClass.
+//----------------------------------------------------------------------------
void PhyRegAlloc::buildInterferenceGraphs()
{
+//----------------------------------------------------------------------------
+// This method will add interferences for incoming arguments to a method.
+//----------------------------------------------------------------------------
void PhyRegAlloc::addInterferencesForArgs()
{
// get the InSet of root BB
}
+//----------------------------------------------------------------------------
+// This method is called after register allocation is complete to set the
+// allocated reisters in the machine code. This code will add register numbers
+// to MachineOperands that contain a Value.
+//----------------------------------------------------------------------------
void PhyRegAlloc::updateMachineCode()
{
// delete this condition checking later (must assert if Val is null)
if( !Val ) {
cout << "Error: NULL Value found in instr." << endl;
+ Op.setRegForValue( 10000 ); // an invalid value is set
continue;
}
assert( Val && "Value is NULL");
+//----------------------------------------------------------------------------
+// This method prints the code with registers after register allocation is
+// complete.
+//----------------------------------------------------------------------------
void PhyRegAlloc::printMachineCode()
{
MachineOperand& Op = MInst->getOperand(OpNum);
if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
- Op.getOperandType() == MachineOperand::MO_CCRegister) {
+ Op.getOperandType() == MachineOperand::MO_CCRegister ||
+ Op.getOperandType() == MachineOperand::MO_MachineRegister ) {
- const Value *const Val = Op.getVRegValue();
+ const int RegNum = Op.getAllocatedRegNum();
- if( !Val ) {
+ // ****this code is temporary till NULL Values are fixed
+ if( RegNum == 10000) {
cout << "\t<*NULL Value*>";
continue;
}
- assert( Val && "Value is NULL");
-
- const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
-
- if ( !LR ) {
-
-
- if( ! ( (Val->getType())->isLabelType() ||
- (Val->getValueType() == Value::ConstantVal) ) ) {
- cout << "\t" << "<*No LiveRange for: ";
- printValue( Val); cout << "*>";
- }
-
-
- //assert( LR && "No LR found for Value");
- continue;
- }
-
- unsigned RCID = (LR->getRegClass())->getID();
-
- //cout << "Setting reg for value: "; printValue( Val );
- //cout << endl;
-
- Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
-
- int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
- cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
+ cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum);
- }
- else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
- cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
- }
+ }
else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
const Value *const Val = Op.getVRegValue () ;
if( !Val ) {
else
cout << "\t" << Op; // use dump field
-
}
}
for( unsigned int rc=0; rc < NumOfRegClasses ; rc++)
RegClassList[ rc ]->colorAllRegs();
- //updateMachineCode();
+ updateMachineCode();
PrintMachineInstructions(Meth);
printMachineCode(); // only for DEBUGGING
}
+#if 0
+
+void PhyRegAlloc::printMachineCode()
+{
+
+ cout << endl << ";************** Method ";
+ cout << Meth->getName() << " *****************" << endl;
+
+ Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
+
+ for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
+
+ cout << endl ; printLabel( *BBI); cout << ": ";
+
+ // get the iterator for machine instructions
+ MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
+ MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
+
+ // iterate over all the machine instructions in BB
+ for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
+
+ MachineInstr *const MInst = *MInstIterator;
+
+
+ cout << endl << "\t";
+ cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
+
+
+ //for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
+
+ for(unsigned OpNum=0; OpNum < MInst->getNumOperands(); ++OpNum) {
+
+ MachineOperand& Op = MInst->getOperand(OpNum);
+
+ if( Op.getOperandType() == MachineOperand::MO_VirtualRegister ||
+ Op.getOperandType() == MachineOperand::MO_CCRegister) {
+
+ const Value *const Val = Op.getVRegValue();
+
+ if( !Val ) {
+ cout << "\t<*NULL Value*>";
+ continue;
+ }
+ assert( Val && "Value is NULL");
+
+ const LiveRange *const LR = LRI.getLiveRangeForValue(Val);
+
+ if ( !LR ) {
+
+
+ if( ! ( (Val->getType())->isLabelType() ||
+ (Val->getValueType() == Value::ConstantVal) ) ) {
+ cout << "\t" << "<*No LiveRange for: ";
+ printValue( Val); cout << "*>";
+ }
+
+
+ //assert( LR && "No LR found for Value");
+ continue;
+ }
+
+ unsigned RCID = (LR->getRegClass())->getID();
+
+ //cout << "Setting reg for value: "; printValue( Val );
+ //cout << endl;
+
+ Op.setRegForValue( MRI.getUnifiedRegNum(RCID, LR->getColor()) );
+
+ int RegNum = MRI.getUnifiedRegNum(RCID, LR->getColor());
+
+ cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
+
+ }
+ else if( Op.getOperandType() == MachineOperand:: MO_MachineRegister) {
+ cout << "\t" << "%"<< MRI.getUnifiedRegName( Op.getMachineRegNum() );
+ }
+ else if( Op.getOperandType() == MachineOperand::MO_PCRelativeDisp ) {
+ const Value *const Val = Op.getVRegValue () ;
+ if( !Val ) {
+ cout << "\t<*NULL Value*>";
+ continue;
+ }
+ if( (Val->getValueType() == Value::BasicBlockVal))
+ { cout << "\t"; printLabel( Op.getVRegValue () ); }
+ else { cout << "\t"; printValue( Val ); }
+ }
+
+ else
+ cout << "\t" << Op; // use dump field
+
+ }
+
+ }
+
+ cout << endl;
+
+ }
+
+ cout << endl;
+}
+
+void PhyRegAlloc::printLabel(const Value *const Val)
+{
+ if( Val->hasName() )
+ cout << Val->getName();
+ else
+ cout << "Label" << Val;
+}
+
+#endif
projects / oota-llvm.git / commitdiff