implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118903 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td
index c100bcb978c519fb8b0b787b5c929321be203181..5f1f2dfef10d7f20abb04ee6fe9dc2602929dce4 100644 (file)
--- a/lib/Target/X86/X86InstrControl.td
+++ b/lib/Target/X86/X86InstrControl.td
@@ -29,6 +29,8 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1,
                     [(X86retflag timm:$amt)]>, OpSize;
   def LRET   : I   <0xCB, RawFrm, (outs), (ins),
                     "lret", []>;
+  def LRETQ  : RI  <0xCB, RawFrm, (outs), (ins),
+                    "lretq", []>;
   def LRETI  : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),
                     "lret\t$amt", []>;
   def LRETIW : Ii16<0xCA, RawFrm, (outs), (ins i16imm:$amt),

diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index 93e90669c81e6b1a5be94bc413f632e76080c517..66074f021165b58d522bf97ec69ea8e52f3f3518 100644 (file)
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -769,6 +769,10 @@ iretq
 // CHECK:  encoding: [0x66,0xca,0xce,0x7a]
                lretw   $0x7ace
 
+// PR8592
+lretq  // CHECK: lretq # encoding: [0x48,0xcb]
+lret   // CHECK: lret  # encoding: [0xcb]
+
 // rdar://8403907
 sysret
 // CHECK: sysretl