return;\r
\r
clk_prepare_enable(rga2_drvdata->rga2);\r
+ clk_prepare_enable(rga2_drvdata->pd_rga2);\r
clk_prepare_enable(rga2_drvdata->aclk_rga2);\r
clk_prepare_enable(rga2_drvdata->hclk_rga2);\r
//clk_enable(rga2_drvdata->pd_rga2);\r
\r
//clk_disable(rga2_drvdata->pd_rga2);\r
clk_disable_unprepare(rga2_drvdata->rga2);\r
+ clk_disable_unprepare(rga2_drvdata->pd_rga2);\r
clk_disable_unprepare(rga2_drvdata->aclk_rga2);\r
clk_disable_unprepare(rga2_drvdata->hclk_rga2);\r
wake_unlock(&rga2_drvdata->wake_lock);\r
\r
//data->pd_rga2 = clk_get(NULL, "pd_rga");\r
data->rga2 = devm_clk_get(&pdev->dev, "clk_rga");\r
+ data->pd_rga2 = devm_clk_get(&pdev->dev, "pd_rga");\r
data->aclk_rga2 = devm_clk_get(&pdev->dev, "aclk_rga");\r
data->hclk_rga2 = devm_clk_get(&pdev->dev, "hclk_rga");\r
\r
}\r
\r
/* Cal out the needed mem size */\r
- AllSize = ((Src0MemSize+3)&(~3)) + ((Src1MemSize+3)&(~3)) + ((DstMemSize+3)&(~3));\r
+ Src0MemSize = (Src0MemSize+15)&(~15);\r
+ Src1MemSize = (Src1MemSize+15)&(~15);\r
+ DstMemSize = (DstMemSize+15)&(~15);\r
+ AllSize = Src0MemSize + Src1MemSize + DstMemSize;\r
\r
pages = kzalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);\r
if(pages == NULL) {\r
req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);\r
}\r
\r
- Src0MemSize = (Src0MemSize + 3) & (~3);\r
-\r
if(Src1MemSize) {\r
ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize, Src1Start, Src1MemSize);\r
if (ret < 0) {\r
\r
/* change the buf address in req struct */\r
req->mmu_info.src1_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize));\r
- req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (Src1MemSize << PAGE_SHIFT);\r
+ req->src1.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));\r
}\r
\r
- Src1MemSize = (Src1MemSize + 3) & (~3);\r
-\r
if(DstMemSize) {\r
ret = rga2_MapUserMemory(&pages[0], MMU_Base + Src0MemSize + Src1MemSize, DstStart, DstMemSize);\r
if (ret < 0) {\r
\r
/* change the buf address in req struct */\r
req->mmu_info.dst_base_addr = ((uint32_t)(MMU_Base_phys + Src0MemSize + Src1MemSize));\r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize) << PAGE_SHIFT);\r
+ req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));\r
uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
- req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize + uv_size) << PAGE_SHIFT);\r
- req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((Src0MemSize + Src1MemSize + v_size) << PAGE_SHIFT);\r
+ req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((uv_size) << PAGE_SHIFT);\r
+ req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((v_size) << PAGE_SHIFT);\r
}\r
\r
/* flush data to DDR */\r