rk2928_map_common_io();
#ifdef DEBUG_UART_BASE
#ifdef CONFIG_RK_USB_UART
- writel_relaxed(0x007f0051, RK2928_GRF_BASE + GRF_UOC0_CON5);
- writel_relaxed(0x34003000, RK2928_GRF_BASE + GRF_UOC1_CON4);
+ if(!(readl_relaxed(RK2928_GRF_BASE + 0x014c) & (1<<7)))//detect vbus
+ {
+ writel_relaxed(0x10001000, RK2928_GRF_BASE + GRF_UOC0_CON0);
+ writel_relaxed(0x007f0055, RK2928_GRF_BASE + GRF_UOC0_CON5);
+ writel_relaxed(0x34003000, RK2928_GRF_BASE + GRF_UOC1_CON4);
+ }
+ else
+ {
+ writel_relaxed(0x34000000, RK2928_GRF_BASE + GRF_UOC1_CON4);
+ }
#else
writel_relaxed(0x34000000, RK2928_GRF_BASE + GRF_UOC1_CON4);
#endif
{\r
struct dwc_otg_platform_data *usbpdata=pdata;\r
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5);\r
+ unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC0_CON0);\r
if(suspend){\r
+ *otg_phy_con2 = (1<<12 | 1<<(12+16));//otg io set to High-Z state\r
*otg_phy_con1 = 0x55 |(0x7f<<16); // enter suspend.\r
usbpdata->phy_status = 1;\r
}\r
else{\r
+ *otg_phy_con2 = 1<<(12+16);\r
*otg_phy_con1 = (0x01<<16); // exit suspend.\r
usbpdata->phy_status = 0;\r
}\r
{\r
struct dwc_otg_platform_data *usbpdata=pdata;\r
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON5);\r
+ unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC1_CON0);\r
if(suspend){\r
+ *otg_phy_con2 = (1 << 12 | 1 << (12+16));//host io set to High-Z state\r
*otg_phy_con1 = 0x1D5 |(0x1ff<<16); // enter suspend.\r
usbpdata->phy_status = 1;\r
}\r
else{\r
+ *otg_phy_con2 = (1 << 12+16);//host io exit High-Z state\r
*otg_phy_con1 = (0x01<<16); // exit suspend.\r
usbpdata->phy_status = 0;\r
}\r