Fix a bug in the legalization of shuffle vectors. When we emulate shuffles using...
authorNadav Rotem <nadav.rotem@intel.com>
Tue, 10 Jan 2012 14:28:46 +0000 (14:28 +0000)
committerNadav Rotem <nadav.rotem@intel.com>
Tue, 10 Jan 2012 14:28:46 +0000 (14:28 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147851 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
test/CodeGen/X86/2012-1-10-buildvector.ll [new file with mode: 0644]

index e69cfd0bf497908d552c981162c9d4a28cfc2f53..4c5bb9e5055aa42f087f8a04b3c4c23d65c51f40 100644 (file)
@@ -2862,8 +2862,10 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node) {
                                   Op1,
                                   DAG.getIntPtrConstant(Idx - NumElems)));
     }
-    
+
     Tmp1 = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], Ops.size());
+    // We may have changed the BUILD_VECTOR type. Cast it back to the Node type.
+    Tmp1 = DAG.getNode(ISD::BITCAST, dl, Node->getValueType(0), Tmp1);
     Results.push_back(Tmp1);
     break;
   }
diff --git a/test/CodeGen/X86/2012-1-10-buildvector.ll b/test/CodeGen/X86/2012-1-10-buildvector.ll
new file mode 100644 (file)
index 0000000..4e7cbc6
--- /dev/null
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=x86 -mcpu=corei7-avx -mattr=+avx -mtriple=i686-pc-win32
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"
+target triple = "i686-pc-win32"
+
+define void @bad_cast() {
+entry:
+  %vext.i = shufflevector <2 x i64> undef, <2 x i64> undef, <3 x i32> <i32 0, i32 1, i32 undef>
+  %vecinit8.i = shufflevector <3 x i64> zeroinitializer, <3 x i64> %vext.i, <3 x i32> <i32 0, i32 3, i32 4>
+  store <3 x i64> %vecinit8.i, <3 x i64>* undef, align 32
+  unreachable
+}
+