[ARM] tegra: Enable pl310 data prefetching and prefetch offset

Enable data prefetching in the L2 cache controller, and set
the prefetch offset to 7.

Memcpy performance measured copying 16 MB buffers 78 times:
Data prefetch disabled, prefetch offset 0: 440 MB/s
Enabling data prefetching, prefetch offset 0: 430 MB/s
Enabling data prefetching, prefetch offset 7: 502 MB/s

Overall, this patch gives a 14% improvement in memcpy performance.

Prefetch offset of 8 causes prefetches to cross 4k boundaries
and cannot be used.

Original-author: Gary King <gking@nvidia.com>
Signed-off-by: Chris Fries <C.Fries@motorola.com>
Signed-off-by: Colin Cross <ccross@android.com>
Change-Id: I7ce0810b3f94edc2640df3f643cf81357052f2f1

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a4b72dca230387f68507e1900eff326c6fd8910f..5283a17f3d2b7112402d52bbf52d1b37929af2a6 100644 (file)
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -88,8 +88,9 @@ void __init tegra_init_cache(void)
 
        writel(0x331, p + L2X0_TAG_LATENCY_CTRL);
        writel(0x441, p + L2X0_DATA_LATENCY_CTRL);
+       writel(7, p + L2X0_PREFETCH_OFFSET);
 
-       l2x0_init(p, 0x6C480001, 0x8200c3fe);
+       l2x0_init(p, 0x7C480001, 0x8200c3fe);
 #endif
 
 }