Doxygenify some methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29592 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index 0e0d5a27483ba7a678c4299797c55dc1ed740f52..151274c8e4ed0838588e7011fc48b99c73536bb3 100644 (file)
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -66,17 +66,21 @@ public:
     RegSize(RS), Alignment(Al), RegsBegin(RB), RegsEnd(RE) {}
   virtual ~TargetRegisterClass() {}     // Allow subclasses
   
-  // getID() - Return the register class ID number.
+  /// getID() - Return the register class ID number.
+  ///
   unsigned getID() const { return ID; }
   
-  // begin/end - Return all of the registers in this class.
+  /// begin/end - Return all of the registers in this class.
+  ///
   iterator       begin() const { return RegsBegin; }
   iterator         end() const { return RegsEnd; }
 
-  // getNumRegs - Return the number of registers in this class
+  /// getNumRegs - Return the number of registers in this class.
+  ///
   unsigned getNumRegs() const { return RegsEnd-RegsBegin; }
 
-  // getRegister - Return the specified register in the class
+  /// getRegister - Return the specified register in the class.
+  ///
   unsigned getRegister(unsigned i) const {
     assert(i < getNumRegs() && "Register number out of range!");
     return RegsBegin[i];