[mips] Add assembler support for .set msa/nomsa directive.

Summary:
These directives are used to toggle whether the assembler accepts MSA-specific instructions or not.

Patch by Matheus Almeida and Toma Tabacu.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215099 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index aaffb718b3cd795c06cbea822aada8a989e7ff8a..ca2032b11c6c9de354d746a129bc12c7b24e0804 100644 (file)
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -167,6 +167,8 @@ class MipsAsmParser : public MCTargetAsmParser {
   bool parseSetNoAtDirective();
   bool parseSetMacroDirective();
   bool parseSetNoMacroDirective();
+  bool parseSetMsaDirective();
+  bool parseSetNoMsaDirective();
   bool parseSetReorderDirective();
   bool parseSetNoReorderDirective();
   bool parseSetNoMips16Directive();
@@ -2487,6 +2489,30 @@ bool MipsAsmParser::parseSetNoMacroDirective() {
   return false;
 }
 
+bool MipsAsmParser::parseSetMsaDirective() {
+  Parser.Lex();
+
+  // If this is not the end of the statement, report an error.
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token in statement");
+
+  setFeatureBits(Mips::FeatureMSA, "msa");
+  getTargetStreamer().emitDirectiveSetMsa();
+  return false;
+}
+
+bool MipsAsmParser::parseSetNoMsaDirective() {
+  Parser.Lex();
+
+  // If this is not the end of the statement, report an error.
+  if (getLexer().isNot(AsmToken::EndOfStatement))
+    return reportParseError("unexpected token in statement");
+
+  clearFeatureBits(Mips::FeatureMSA, "msa");
+  getTargetStreamer().emitDirectiveSetNoMsa();
+  return false;
+}
+
 bool MipsAsmParser::parseSetNoMips16Directive() {
   Parser.Lex();
   // If this is not the end of the statement, report an error.
@@ -2782,6 +2808,10 @@ bool MipsAsmParser::parseDirectiveSet() {
     return parseSetFeature(Mips::FeatureMips64r6);
   } else if (Tok.getString() == "dsp") {
     return parseSetFeature(Mips::FeatureDSP);
+  } else if (Tok.getString() == "msa") {
+    return parseSetMsaDirective();
+  } else if (Tok.getString() == "nomsa") {
+    return parseSetNoMsaDirective();
   } else {
     // It is just an identifier, look for an assignment.
     parseSetAssignment();

diff --git a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 0f02107b81ab145fce7fcecc19bd349d5aeeb17d..7a8230fdebf8db52e5c2cc800d94fa3a9190b187 100644 (file)
--- a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -38,6 +38,8 @@ void MipsTargetStreamer::emitDirectiveSetReorder() {}
 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
 void MipsTargetStreamer::emitDirectiveSetMacro() {}
 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
+void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
+void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
 void MipsTargetStreamer::emitDirectiveSetAt() {}
 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
@@ -118,6 +120,16 @@ void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
   setCanHaveModuleDir(false);
 }
 
+void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
+  OS << "\t.set\tmsa\n";
+  MipsTargetStreamer::emitDirectiveSetMsa();
+}
+
+void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
+  OS << "\t.set\tnomsa\n";
+  MipsTargetStreamer::emitDirectiveSetNoMsa();
+}
+
 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
   OS << "\t.set\tat\n";
   setCanHaveModuleDir(false);

diff --git a/lib/Target/Mips/MipsTargetStreamer.h b/lib/Target/Mips/MipsTargetStreamer.h
index 67ac7578b880bd4799063e7d5f39ee828265e26e..8253c6225639d044299f2096248551c77a792470 100644 (file)
--- a/lib/Target/Mips/MipsTargetStreamer.h
+++ b/lib/Target/Mips/MipsTargetStreamer.h
@@ -30,6 +30,8 @@ public:
   virtual void emitDirectiveSetNoReorder();
   virtual void emitDirectiveSetMacro();
   virtual void emitDirectiveSetNoMacro();
+  virtual void emitDirectiveSetMsa();
+  virtual void emitDirectiveSetNoMsa();
   virtual void emitDirectiveSetAt();
   virtual void emitDirectiveSetNoAt();
   virtual void emitDirectiveEnd(StringRef Name);
@@ -114,6 +116,8 @@ public:
   void emitDirectiveSetNoReorder() override;
   void emitDirectiveSetMacro() override;
   void emitDirectiveSetNoMacro() override;
+  void emitDirectiveSetMsa() override;
+  void emitDirectiveSetNoMsa() override;
   void emitDirectiveSetAt() override;
   void emitDirectiveSetNoAt() override;
   void emitDirectiveEnd(StringRef Name) override;

diff --git a/test/MC/Mips/msa/set-msa-directive-bad.s b/test/MC/Mips/msa/set-msa-directive-bad.s
new file mode 100644 (file)
index 0000000..02cb9a6
--- /dev/null
+++ b/test/MC/Mips/msa/set-msa-directive-bad.s
@@ -0,0 +1,11 @@
+# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
+# RUN: FileCheck %s < %t1
+
+    .set nomsa
+    addvi.b     $w14, $w12, 14 # CHECK: error: instruction requires a CPU feature not currently enabled
+
+    .set msa
+    addvi.h     $w26, $w17, 4 
+    
+    .set nomsa
+    addvi.w     $w19, $w13, 11 # CHECK: error: instruction requires a CPU feature not currently enabled

diff --git a/test/MC/Mips/msa/set-msa-directive.s b/test/MC/Mips/msa/set-msa-directive.s
new file mode 100644 (file)
index 0000000..461ddba
--- /dev/null
+++ b/test/MC/Mips/msa/set-msa-directive.s
@@ -0,0 +1,22 @@
+# RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 | FileCheck %s
+
+# CHECK:    .set msa
+# CHECK:    addvi.b     $w14, $w12, 14
+# CHECK:    addvi.h     $w26, $w17, 4
+# CHECK:    addvi.w     $w19, $w13, 11
+# CHECK:    addvi.d     $w16, $w19, 7    
+# CHECK:    subvi.b     $w14, $w12, 14
+# CHECK:    subvi.h     $w26, $w17, 4
+# CHECK:    subvi.w     $w19, $w13, 11
+# CHECK:    subvi.d     $w16, $w19, 7
+
+    .set msa
+    addvi.b     $w14, $w12, 14
+    addvi.h     $w26, $w17, 4
+    addvi.w     $w19, $w13, 11
+    addvi.d     $w16, $w19, 7
+    
+    subvi.b     $w14, $w12, 14
+    subvi.h     $w26, $w17, 4
+    subvi.w     $w19, $w13, 11
+    subvi.d     $w16, $w19, 7