UPSTREAM: clocksource/drivers/rockchip: Remove dsb() usage

The dsb() instruction is pointless in this code.

Remove it.

That also fixes the ARM64 compilation issue.

Change-Id: I0c8e33abe0d976714f4df288fe5ac52ffb8ded5b
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 23b8f81f3890edd06bcabdaac33ff5c087114c59)

diff --git a/drivers/clocksource/rockchip_timer.c b/drivers/clocksource/rockchip_timer.c
index b14716b62d6338a4e74304cfe402454edfcd7bb0..8c77a529d0d445bb91583f3256e7fdc4a6da6caf 100644 (file)
--- a/drivers/clocksource/rockchip_timer.c
+++ b/drivers/clocksource/rockchip_timer.c
@@ -49,14 +49,12 @@ static inline void __iomem *rk_base(struct clock_event_device *ce)
 static inline void rk_timer_disable(struct clock_event_device *ce)
 {
        writel_relaxed(TIMER_DISABLE, rk_base(ce) + TIMER_CONTROL_REG);
-       dsb();
 }
 
 static inline void rk_timer_enable(struct clock_event_device *ce, u32 flags)
 {
        writel_relaxed(TIMER_ENABLE | TIMER_INT_UNMASK | flags,
                       rk_base(ce) + TIMER_CONTROL_REG);
-       dsb();
 }
 
 static void rk_timer_update_counter(unsigned long cycles,
@@ -64,13 +62,11 @@ static void rk_timer_update_counter(unsigned long cycles,
 {
        writel_relaxed(cycles, rk_base(ce) + TIMER_LOAD_COUNT0);
        writel_relaxed(0, rk_base(ce) + TIMER_LOAD_COUNT1);
-       dsb();
 }
 
 static void rk_timer_interrupt_clear(struct clock_event_device *ce)
 {
        writel_relaxed(1, rk_base(ce) + TIMER_INT_STATUS);
-       dsb();
 }
 
 static inline int rk_timer_set_next_event(unsigned long cycles,