Add information preventing several register class constraints from working.

This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index d96be87efdea5a70d93a1709512a60bb8cf30c51..4ebe4caad098a203e07541c3d3cb4e002ea8f2e1 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4140,7 +4140,15 @@ SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N,
 X86TargetLowering::ConstraintType
 X86TargetLowering::getConstraintType(char ConstraintLetter) const {
   switch (ConstraintLetter) {
-  case 'A': return C_RegisterClass;
+  case 'A':
+  case 'r':
+  case 'R':
+  case 'l':
+  case 'q':
+  case 'Q':
+  case 'x':
+  case 'Y':
+    return C_RegisterClass;
   default: return TargetLowering::getConstraintType(ConstraintLetter);
   }
 }