[BNX2]: Restructure IRQ datastructures.
authorMichael Chan <mchan@broadcom.com>
Fri, 21 Dec 2007 03:56:09 +0000 (19:56 -0800)
committerDavid S. Miller <davem@davemloft.net>
Mon, 28 Jan 2008 22:57:34 +0000 (14:57 -0800)
Add a table to keep track of multiple IRQs and restructure the IRQ
request and free functions so that they can be easily expanded to
handle multiple IRQs.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2.c
drivers/net/bnx2.h

index f19a1e9a6b7f2c37da21c9fedd7a7c1b0e66d12c..83cdbde5d2d68af0775af0f83e1dbd1d0e6a110c 100644 (file)
@@ -5234,18 +5234,15 @@ static int
 bnx2_request_irq(struct bnx2 *bp)
 {
        struct net_device *dev = bp->dev;
-       int rc = 0;
-
-       if (bp->flags & USING_MSI_FLAG) {
-               irq_handler_t   fn = bnx2_msi;
-
-               if (bp->flags & ONE_SHOT_MSI_FLAG)
-                       fn = bnx2_msi_1shot;
+       unsigned long flags;
+       struct bnx2_irq *irq = &bp->irq_tbl[0];
+       int rc;
 
-               rc = request_irq(bp->pdev->irq, fn, 0, dev->name, dev);
-       } else
-               rc = request_irq(bp->pdev->irq, bnx2_interrupt,
-                                IRQF_SHARED, dev->name, dev);
+       if (bp->flags & USING_MSI_FLAG)
+               flags = 0;
+       else
+               flags = IRQF_SHARED;
+       rc = request_irq(irq->vector, irq->handler, flags, dev->name, dev);
        return rc;
 }
 
@@ -5254,12 +5251,31 @@ bnx2_free_irq(struct bnx2 *bp)
 {
        struct net_device *dev = bp->dev;
 
+       free_irq(bp->irq_tbl[0].vector, dev);
        if (bp->flags & USING_MSI_FLAG) {
-               free_irq(bp->pdev->irq, dev);
                pci_disable_msi(bp->pdev);
                bp->flags &= ~(USING_MSI_FLAG | ONE_SHOT_MSI_FLAG);
-       } else
-               free_irq(bp->pdev->irq, dev);
+       }
+}
+
+static void
+bnx2_setup_int_mode(struct bnx2 *bp, int dis_msi)
+{
+       bp->irq_tbl[0].handler = bnx2_interrupt;
+       strcpy(bp->irq_tbl[0].name, bp->dev->name);
+
+       if ((bp->flags & MSI_CAP_FLAG) && !dis_msi) {
+               if (pci_enable_msi(bp->pdev) == 0) {
+                       bp->flags |= USING_MSI_FLAG;
+                       if (CHIP_NUM(bp) == CHIP_NUM_5709) {
+                               bp->flags |= ONE_SHOT_MSI_FLAG;
+                               bp->irq_tbl[0].handler = bnx2_msi_1shot;
+                       } else
+                               bp->irq_tbl[0].handler = bnx2_msi;
+               }
+       }
+
+       bp->irq_tbl[0].vector = bp->pdev->irq;
 }
 
 /* Called with rtnl_lock */
@@ -5278,15 +5294,8 @@ bnx2_open(struct net_device *dev)
        if (rc)
                return rc;
 
+       bnx2_setup_int_mode(bp, disable_msi);
        napi_enable(&bp->napi);
-
-       if ((bp->flags & MSI_CAP_FLAG) && !disable_msi) {
-               if (pci_enable_msi(bp->pdev) == 0) {
-                       bp->flags |= USING_MSI_FLAG;
-                       if (CHIP_NUM(bp) == CHIP_NUM_5709)
-                               bp->flags |= ONE_SHOT_MSI_FLAG;
-               }
-       }
        rc = bnx2_request_irq(bp);
 
        if (rc) {
@@ -5325,6 +5334,8 @@ bnx2_open(struct net_device *dev)
                        bnx2_disable_int(bp);
                        bnx2_free_irq(bp);
 
+                       bnx2_setup_int_mode(bp, 1);
+
                        rc = bnx2_init_nic(bp);
 
                        if (!rc)
index 1f244faf36240cda41dfbbc49cb945822376e4a3..1accf0093126305066a5c232dd1d884caafc9977 100644 (file)
@@ -6494,6 +6494,15 @@ struct flash_spec {
        u8  *name;
 };
 
+#define BNX2_MAX_MSIX_HW_VEC   9
+#define BNX2_MAX_MSIX_VEC      1
+
+struct bnx2_irq {
+       irq_handler_t   handler;
+       u16             vector;
+       char            name[16];
+};
+
 struct bnx2 {
        /* Fields used in the tx and intr/napi performance paths are grouped */
        /* together in the beginning of the structure. */
@@ -6721,6 +6730,9 @@ struct bnx2 {
        u32                     flash_size;
 
        int                     status_stats_size;
+
+       struct bnx2_irq         irq_tbl[BNX2_MAX_MSIX_VEC];
+       int                     irq_nvecs;
 };
 
 static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);