ARM: tegra: Enable IOMMU for display controllers on Tegra30

Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index fa7e5b6424343d794c98314a4cbef4d43af8ff1a..976eb9ba86590036be7e4115fb83579145d695f3 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,5 +1,6 @@
 #include <dt-bindings/clock/tegra30-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra30-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -174,6 +175,8 @@
                        resets = <&tegra_car 27>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DC>;
+
                        nvidia,head = <0>;
 
                        rgb {
@@ -191,6 +194,8 @@
                        resets = <&tegra_car 26>;
                        reset-names = "dc";
 
+                       iommus = <&mc TEGRA_SWGROUP_DCB>;
+
                        nvidia,head = <1>;
 
                        rgb {