usb-uart: add support 3188&3288 kernel-3.10
authorlyz <lyz@rock-chips.com>
Thu, 13 Mar 2014 01:33:50 +0000 (09:33 +0800)
committerlyz <lyz@rock-chips.com>
Fri, 14 Mar 2014 10:16:14 +0000 (18:16 +0800)
arch/arm/mach-rockchip/Kconfig
arch/arm/mach-rockchip/rk3188.c
arch/arm/mach-rockchip/rk3288.c
drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c
drivers/usb/dwc_otg_310/usbdev_rk30.c

index 0c6523e5db9bdc58d626207623675ea7bd8f12fa..43389aab03140c476a6d6c687ac8d12319eefc2b 100755 (executable)
@@ -28,6 +28,10 @@ config RK_DEBUG_UART
        help
          Select a UART for debugging. -1 disable.
 
+config RK_USB_UART
+        bool "Support USB UART Bypass Function"
+        depends on (RK_DEBUG_UART = 2) 
+
 config RK_CONSOLE_THREAD
        bool "Console write by thread"
        depends on FIQ_DEBUGGER_CONSOLE
index 087cf2887d82ade5332a16577e085059c5ff123e..464e64cc0a328b57de04e96719135ad89d972c67 100755 (executable)
@@ -71,11 +71,26 @@ static void __init rk3188_boot_mode_init(void)
        writel_relaxed(BOOT_MODE_WATCHDOG, RK_PMU_VIRT + RK3188_PMU_SYS_REG1);
 #endif
 }
+static void usb_uart_init(void)
+{
+    u32 soc_status0;
+       writel_relaxed(0x03100000, RK_GRF_VIRT + RK3188_GRF_UOC0_CON0);
+#ifdef CONFIG_RK_USB_UART
+    soc_status0 = (readl_relaxed(RK_GRF_VIRT + RK3188_GRF_SOC_STATUS0));
+    if(!(soc_status0 & (1<<10)) && (soc_status0 & (1<<13)))
+    {
+        writel_relaxed(0x00040004, RK_GRF_VIRT + RK3188_GRF_UOC0_CON2); //software control usb phy enable 
+               writel_relaxed(0x003f002a, RK_GRF_VIRT + RK3188_GRF_UOC0_CON3); //usb phy enter suspend
+               writel_relaxed(0x03000300, RK_GRF_VIRT + RK3188_GRF_UOC0_CON0);
+    }    
+#endif // end of CONFIG_RK_USB_UART
+}
 
 static void __init rk3188_dt_map_io(void)
 {
        iotable_init(rk3188_io_desc, ARRAY_SIZE(rk3188_io_desc));
        debug_ll_io_init();
+    usb_uart_init();
 
        rockchip_soc_id = ROCKCHIP_SOC_RK3188;
        if (readl_relaxed(RK_ROM_VIRT + 0x27f0) == 0x33313042
index c67ad6340980955f622fe72520f25cd9d5bc02de..10579018fc6433e1592eaf4db285b651ce8262f2 100755 (executable)
@@ -82,6 +82,21 @@ static void __init rk3288_boot_mode_init(void)
 
 extern void secondary_startup(void);
 
+static void usb_uart_init(void)
+{
+    u32 soc_status2;
+       writel_relaxed(0x00c00000, RK_GRF_VIRT + RK3288_GRF_UOC0_CON3);
+#ifdef CONFIG_RK_USB_UART
+    soc_status2 = (readl_relaxed(RK_GRF_VIRT + RK3288_GRF_SOC_STATUS2));
+    if(!(soc_status2 & (1<<14)) && (soc_status2 & (1<<17)))
+    {
+        writel_relaxed(0x00040004, RK_GRF_VIRT + RK3288_GRF_UOC0_CON2); //software control usb phy enable 
+               writel_relaxed(0x003f002a, RK_GRF_VIRT + RK3288_GRF_UOC0_CON3); //usb phy enter suspend
+               writel_relaxed(0x00c000c0, RK_GRF_VIRT + RK3288_GRF_UOC0_CON3);
+    }    
+#endif // end of CONFIG_RK_USB_UART
+}
+
 static void __init rk3288_dt_map_io(void)
 {
        iotable_init(rk3288_io_desc, ARRAY_SIZE(rk3288_io_desc));
index 8b85656234523fa751a9753bfd682691a8d1e163..60e15a47a495a8e2f85e23c93764f9079ed520a2 100755 (executable)
@@ -1614,6 +1614,9 @@ EXPORT_SYMBOL(dwc_vbus_status);
 
 static void dwc_otg_pcd_work_init(dwc_otg_pcd_t *pcd, struct platform_device *dev)
 {
+
+       struct dwc_otg_device* otg_dev = pcd->otg_dev;
+       struct dwc_otg_platform_data *pldata = otg_dev->pldata;
        pcd->vbus_status  = 0;
        pcd->phy_suspend  = 0;
 
index 864fec49293384654d6c4085c0a3406d969910ac..69bc695969b1cf4132b386497e8a9e0e12bb1410 100755 (executable)
@@ -577,11 +577,11 @@ static int dwc_otg_control_usb_probe(struct platform_device *pdev)
                ret = err;
                goto err2;
        }
-#if 0 //disable for debug
+
        ret = otg_irq_detect_init(pdev);
        if (ret < 0)
                goto err2;
-#endif
+
        return 0;
 
 err2: