Do not examine variadic or implicit operands if instruction is a return (jr).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141157 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 91a80a71aa36f0c15e31bdb17f3b14f2ec4761e2..bbcdb1ee80788b532004dbcdf2ba805c2f5ebce1 100644 (file)
--- a/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -222,8 +222,9 @@ void Filler::insertDefsUses(MachineBasicBlock::iterator MI,
   //       no instruction that can possibly be put in a delay slot can read or
   //       write it.
 
-  unsigned e = MI->getDesc().isCall() ? MI->getDesc().getNumOperands() :
-                                        MI->getNumOperands();
+  MCInstrDesc MCID = MI->getDesc();
+  unsigned e = MCID.isCall() || MCID.isReturn() ? MCID.getNumOperands() :
+                                                  MI->getNumOperands();
 
   for (unsigned i = 0; i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);