usb: host: ehci-hub: Add port_reset_no_wait quirk

Tegra quirk: The PORT_RESET bit in PORTSC1 does not need to be cleared
and there is no need to wait for it to clear. The bit will automatically
change to 0 when the bus-reset sequence is done and an interrupt will be
generated.

Change-Id: I645417013af46785a249096ebc06a1f688228d94
Signed-off-by: Benoit Goby <benoit@android.com>

diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 796ea0c8900f77ce19a03faf9ca6e7852aa2456e..e33e78cbde000b4892ab2ac72890e972969baee8 100644 (file)
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -900,6 +900,7 @@ static int ehci_hub_control (
 
                /* whoever resets must GetPortStatus to complete it!! */
                if ((temp & PORT_RESET)
+                               && !ehci->port_reset_no_wait
                                && time_after_eq(jiffies,
                                        ehci->reset_done[wIndex])) {
                        status |= USB_PORT_STAT_C_RESET << 16;

diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 3de86c1debd2e098e35628470851118ac9e1cc14..9dd486abd6212287035cc3594da7c314e82ab9c5 100644 (file)
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -132,6 +132,7 @@ struct ehci_hcd {                   /* one per controller */
        unsigned                broken_periodic:1;
        unsigned                fs_i_thresh:1;  /* Intel iso scheduling */
        unsigned                controller_resets_phy:1;
+       unsigned                port_reset_no_wait:1;
 
        /* required for usb32 quirk */
        #define OHCI_CTRL_HCFS          (3 << 6)