Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding...
authorChristopher Lamb <christopher.lamb@gmail.com>
Thu, 26 Jul 2007 07:00:46 +0000 (07:00 +0000)
committerChristopher Lamb <christopher.lamb@gmail.com>
Thu, 26 Jul 2007 07:00:46 +0000 (07:00 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40514 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineInstr.h
include/llvm/CodeGen/MachineInstrBuilder.h
lib/CodeGen/MachineInstr.cpp

index 1f621c116ed92f4a8abbd49acd6a3bcf17945da7..48cf62cfa77b660fa2a9d4dac9c80fdd3916df6b 100644 (file)
@@ -76,10 +76,6 @@ private:
     /// offset - Offset to address of global or external, only valid for
     /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
     int offset;
-
-    /// subReg - SubRegister number, only valid for MO_Register.  A value of 0
-    /// indicates the MO_Register has no subReg.
-    unsigned subReg;
   } auxInfo;
   
   MachineOperand() {}
@@ -178,10 +174,6 @@ public:
         "Wrong MachineOperand accessor");
     return auxInfo.offset;
   }
-  unsigned getSubReg() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
-    return auxInfo.subReg;
-  }
   const char *getSymbolName() const {
     assert(isExternalSymbol() && "Wrong MachineOperand accessor");
     return contents.SymbolName;
@@ -267,10 +259,6 @@ public:
         "Wrong MachineOperand accessor");
     auxInfo.offset = Offset;
   }
-  void setSubReg(unsigned subReg) {
-    assert(isRegister() && "Wrong MachineOperand accessor");
-    auxInfo.subReg = subReg;
-  }
   void setConstantPoolIndex(unsigned Idx) {
     assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
     contents.immedVal = Idx;
@@ -459,7 +447,6 @@ public:
     Op.IsKill = IsKill;
     Op.IsDead = IsDead;
     Op.contents.RegNo = Reg;
-    Op.auxInfo.subReg = 0;
   }
 
   /// addImmOperand - Add a zero extended constant argument to the
index eb45b6ec1fa62324191b2ddc9c69f9b405d4d8a5..c20d52d5adfc7184c7a3a0d4c62974a6c9b73c76 100644 (file)
@@ -37,7 +37,7 @@ public:
   /// addReg - Add a new virtual register operand...
   ///
   const
-  MachineInstrBuilder &addReg(int RegNo, bool isDef = false, bool isImp = false,
+  MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false, bool isImp = false,
                               bool isKill = false, bool isDead = false) const {
     MI->addRegOperand(RegNo, isDef, isImp, isKill, isDead);
     return *this;
index c5e2ba81bf62e00bf2a982a0fb8204fb7ebf9099..8a592318c51c5db53d4c63f61e10608fcacee7bb 100644 (file)
@@ -39,7 +39,6 @@ void MachineInstr::addImplicitDefUseOperands() {
       Op.IsKill = false;
       Op.IsDead = false;
       Op.contents.RegNo = *ImpDefs;
-      Op.auxInfo.subReg = 0;
       Operands.push_back(Op);
     }
   if (TID->ImplicitUses)
@@ -51,7 +50,6 @@ void MachineInstr::addImplicitDefUseOperands() {
       Op.IsKill = false;
       Op.IsDead = false;
       Op.contents.RegNo = *ImpUses;
-      Op.auxInfo.subReg = 0;
       Operands.push_back(Op);
     }
 }