Documentation: clk: Fix a trivial typo in audss
authorSachin Kamat <sachin.kamat@linaro.org>
Fri, 12 Jul 2013 03:23:43 +0000 (08:53 +0530)
committerMike Turquette <mturquette@linaro.org>
Thu, 8 Aug 2013 22:57:18 +0000 (15:57 -0700)
Fixes a trivial typo.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/clk-exynos-audss.txt

index a1201802f90d0d8fdcfd552c7d359c3cc7b79d31..75e2e1999f87dabdb7eccc94ba01d472533a69fd 100644 (file)
@@ -2,7 +2,7 @@
 
 The Samsung Audio Subsystem clock controller generates and supplies clocks
 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
-binding described here is applicable to all SoC's in Exynos family.
+binding described here is applicable to all SoCs in Exynos family.
 
 Required Properties: