#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
+#include "Support/CommandLine.h"
#include <iostream>
AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>());
-cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden,
+LiveVarDebugLevel_t DEBUG_LV;
+
+static cl::Enum<LiveVarDebugLevel_t> DEBUG_LV_opt(DEBUG_LV, "dlivevar", cl::Hidden,
"enable live-variable debugging information",
clEnumValN(LV_DEBUG_None , "n", "disable debug output"),
clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"),
clEnumValN(LV_DEBUG_Instr, "i", "print live-var sets before/after every machine instrn"),
clEnumValN(LV_DEBUG_Verbose, "v", "print def, use sets for every instrn also"), 0);
+
+
//-----------------------------------------------------------------------------
// Accessor Functions
//-----------------------------------------------------------------------------
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
+#include "Support/CommandLine.h"
#include <algorithm>
using std::cerr;
using std::vector;
-//************************* External Data Types *****************************/
+SchedDebugLevel_t SchedDebugLevel;
-cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden,
+static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
"enable instruction scheduling debugging information",
clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"),
clEnumValN(Sched_Disable, "off", "disable instruction scheduling"),
#include "SchedGraph.h"
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Target/MachineSchedInfo.h"
-#include "Support/CommandLine.h"
#include <list>
#include <ext/hash_set>
#include <iostream>
Sched_PrintSchedGraphs,
};
-extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
+extern SchedDebugLevel_t SchedDebugLevel;
//---------------------------------------------------------------------------
// Function: instrIsFeasible
#include "llvm/Type.h"
#include "llvm/iOther.h"
#include "llvm/CodeGen/RegAllocCommon.h"
+#include "Support/CommandLine.h"
#include <iostream>
#include <math.h>
using std::cerr;
-
-// ***TODO: There are several places we add instructions. Validate the order
-// of adding these instructions.
-
-cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden,
+RegAllocDebugLevel_t DEBUG_RA;
+static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
+ cl::Hidden,
"enable register allocation debugging information",
clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instruction.h"
+#include "Support/CommandLine.h"
#include <algorithm>
using std::cerr;
using std::vector;
-//************************* External Data Types *****************************/
+SchedDebugLevel_t SchedDebugLevel;
-cl::Enum<enum SchedDebugLevel_t> SchedDebugLevel("dsched", cl::Hidden,
+static cl::Enum<enum SchedDebugLevel_t> Opt(SchedDebugLevel,"dsched",cl::Hidden,
"enable instruction scheduling debugging information",
clEnumValN(Sched_NoDebugInfo, "n", "disable debug output"),
clEnumValN(Sched_Disable, "off", "disable instruction scheduling"),
#include "SchedGraph.h"
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/Target/MachineSchedInfo.h"
-#include "Support/CommandLine.h"
#include <list>
#include <ext/hash_set>
#include <iostream>
Sched_PrintSchedGraphs,
};
-extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
+extern SchedDebugLevel_t SchedDebugLevel;
//---------------------------------------------------------------------------
// Function: instrIsFeasible
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
+#include "Support/CommandLine.h"
#include <iostream>
AnalysisID FunctionLiveVarInfo::ID(AnalysisID::create<FunctionLiveVarInfo>());
-cl::Enum<LiveVarDebugLevel_t> DEBUG_LV("dlivevar", cl::Hidden,
+LiveVarDebugLevel_t DEBUG_LV;
+
+static cl::Enum<LiveVarDebugLevel_t> DEBUG_LV_opt(DEBUG_LV, "dlivevar", cl::Hidden,
"enable live-variable debugging information",
clEnumValN(LV_DEBUG_None , "n", "disable debug output"),
clEnumValN(LV_DEBUG_Normal , "y", "enable debug output"),
clEnumValN(LV_DEBUG_Instr, "i", "print live-var sets before/after every machine instrn"),
clEnumValN(LV_DEBUG_Verbose, "v", "print def, use sets for every instrn also"), 0);
+
+
//-----------------------------------------------------------------------------
// Accessor Functions
//-----------------------------------------------------------------------------
#include "llvm/Type.h"
#include "llvm/iOther.h"
#include "llvm/CodeGen/RegAllocCommon.h"
+#include "Support/CommandLine.h"
#include <iostream>
#include <math.h>
using std::cerr;
-
-// ***TODO: There are several places we add instructions. Validate the order
-// of adding these instructions.
-
-cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::Hidden,
+RegAllocDebugLevel_t DEBUG_RA;
+static cl::Enum<RegAllocDebugLevel_t> DEBUG_RA_c(DEBUG_RA, "dregalloc",
+ cl::Hidden,
"enable register allocation debugging information",
clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),