/// LiveIns/LiveOuts - Keep track of the physical registers that are
/// livein/liveout of the function. Live in values are typically arguments in
/// registers, live out values are typically return values in registers.
- std::vector<unsigned> LiveIns, LiveOuts;
+ /// LiveIn values are allowed to have virtual registers associated with them,
+ /// stored in the second element.
+ std::vector<std::pair<unsigned, unsigned> > LiveIns;
+ std::vector<unsigned> LiveOuts;
public:
MachineFunction(const Function *Fn, const TargetMachine &TM);
/// addLiveIn/Out - Add the specified register as a live in/out. Note that it
/// is an error to add the same register to the same set more than once.
- void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
+ void addLiveIn(unsigned Reg, unsigned vreg = 0) {
+ LiveIns.push_back(std::make_pair(Reg, vreg));
+ }
void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); }
// Iteration support for live in/out sets. These sets are kept in sorted
// order by their register number.
- typedef std::vector<unsigned>::const_iterator liveinout_iterator;
- liveinout_iterator livein_begin() const { return LiveIns.begin(); }
- liveinout_iterator livein_end() const { return LiveIns.end(); }
- liveinout_iterator liveout_begin() const { return LiveOuts.begin(); }
- liveinout_iterator liveout_end() const { return LiveOuts.end(); }
+ typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator
+ livein_iterator;
+ typedef std::vector<unsigned>::const_iterator liveout_iterator;
+ livein_iterator livein_begin() const { return LiveIns.begin(); }
+ livein_iterator livein_end() const { return LiveIns.end(); }
+ liveout_iterator liveout_begin() const { return LiveOuts.begin(); }
+ liveout_iterator liveout_end() const { return LiveOuts.end(); }
/// getBlockNumbered - MachineBasicBlocks are automatically numbered when they
/// are inserted into the machine function. The block number for a machine
// beginning of the function that we will pretend "defines" the values. This
// is to make the interval analysis simpler by providing a number.
if (fn.livein_begin() != fn.livein_end()) {
- unsigned FirstLiveIn = *fn.livein_begin();
+ unsigned FirstLiveIn = fn.livein_begin()->first;
// Find a reg class that contains this live in.
const TargetRegisterClass *RC = 0;
// Note intervals due to live-in values.
if (fn.livein_begin() != fn.livein_end()) {
MachineBasicBlock *Entry = fn.begin();
- for (MachineFunction::liveinout_iterator I = fn.livein_begin(),
+ for (MachineFunction::livein_iterator I = fn.livein_begin(),
E = fn.livein_end(); I != E; ++I) {
handlePhysicalRegisterDef(Entry, Entry->begin(),
- getOrCreateInterval(*I), 0, 0);
- for (const unsigned* AS = mri_->getAliasSet(*I); *AS; ++AS)
+ getOrCreateInterval(I->first), 0, 0);
+ for (const unsigned* AS = mri_->getAliasSet(I->first); *AS; ++AS)
handlePhysicalRegisterDef(Entry, Entry->begin(),
getOrCreateInterval(*AS), 0, 0);
}
VirtRegInfo.resize(64);
// Mark live-in registers as live-in.
- for (MachineFunction::liveinout_iterator I = MF.livein_begin(),
+ for (MachineFunction::livein_iterator I = MF.livein_begin(),
E = MF.livein_end(); I != E; ++I) {
- assert(MRegisterInfo::isPhysicalRegister(*I) &&
+ assert(MRegisterInfo::isPhysicalRegister(I->first) &&
"Cannot have a live-in virtual register!");
- HandlePhysRegDef(*I, 0);
+ HandlePhysRegDef(I->first, 0);
}
// Calculate live variable information in depth first order on the CFG of the
// it as using all of the live-out values in the function.
if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) {
MachineInstr *Ret = &MBB->back();
- for (MachineFunction::liveinout_iterator I = MF.liveout_begin(),
+ for (MachineFunction::liveout_iterator I = MF.liveout_begin(),
E = MF.liveout_end(); I != E; ++I) {
assert(MRegisterInfo::isPhysicalRegister(*I) &&
"Cannot have a live-in virtual register!");