Moved enum and command-line option in separate file. Also added function that returns...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8819 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h
index 309bf66cf81967749629b630cd8abf1a3b985305..a5dc323aa928009161dda0950b969e14c4f97ff9 100644 (file)
--- a/include/llvm/CodeGen/Passes.h
+++ b/include/llvm/CodeGen/Passes.h
@@ -19,7 +19,9 @@ class TargetMachine;
 //
 extern const PassInfo *PHIEliminationID;
 
-enum RegAllocName { simple, local };
+/// Creates a register allocator as the user specified on the command
+/// line.
+FunctionPass *createRegisterAllocator();
 
 /// SimpleRegisterAllocation Pass - This pass converts the input machine code
 /// from SSA form to use explicit registers by spilling every register.  Wow,

diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp
new file mode 100644 (file)
index 0000000..86f354e
--- /dev/null
+++ b/lib/CodeGen/Passes.cpp
@@ -0,0 +1,35 @@
+//===-- Passes.cpp - Target independent code generation passes -*- C++ -*-===//
+//
+// This file defines interfaces to access the target independent code
+// generation passes provided by the LLVM backend.
+//
+//===---------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/Passes.h"
+#include "Support/CommandLine.h"
+
+namespace {
+  enum RegAllocName { simple, local };
+
+  cl::opt<RegAllocName>
+  RegAlloc("regalloc",
+           cl::desc("Register allocator to use: (default = simple)"),
+           cl::Prefix,
+           cl::values(clEnumVal(simple, "  simple register allocator"),
+                      clEnumVal(local,  "  local register allocator"),
+                      0),
+           cl::init(local));
+}
+
+FunctionPass *createRegisterAllocator()
+{
+  switch (RegAlloc) {
+  case simple:
+    return createSimpleRegisterAllocator();
+  case local:
+    return createLocalRegisterAllocator();
+  default:
+    assert(0 && "no register allocator selected");
+    return 0; // not reached
+  }
+}

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 8f6829f6de4ad49341048714df9e58e013257e98..d511de67212a702c023366294ae9c7f47497aca7 100644 (file)
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -16,15 +16,6 @@
 #include "Support/Statistic.h"
 
 namespace {
-  cl::opt<RegAllocName>
-  RegAlloc("regalloc",
-           cl::desc("Register allocator to use: (default = simple)"),
-           cl::Prefix,
-           cl::values(clEnumVal(simple, "  simple register allocator"),
-                      clEnumVal(local,  "  local register allocator"),
-                      0),
-           cl::init(local));
-
   cl::opt<bool> PrintCode("print-machineinstrs",
                          cl::desc("Print generated machine code"));
   cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true),
@@ -73,16 +64,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
     PM.add(createMachineFunctionPrinterPass());
 
   // Perform register allocation to convert to a concrete x86 representation
-  switch (RegAlloc) {
-  case simple:
-    PM.add(createSimpleRegisterAllocator());
-    break;
-  case local:
-    PM.add(createLocalRegisterAllocator());
-    break;
-  default:
-    assert(0 && "no register allocator selected");
-  }
+  PM.add(createRegisterAllocator());
 
   if (PrintCode)
     PM.add(createMachineFunctionPrinterPass());
@@ -126,16 +108,7 @@ bool X86TargetMachine::addPassesToJITCompile(FunctionPassManager &PM) {
     PM.add(createMachineFunctionPrinterPass());
 
   // Perform register allocation to convert to a concrete x86 representation
-  switch (RegAlloc) {
-  case simple:
-    PM.add(createSimpleRegisterAllocator());
-    break;
-  case local:
-    PM.add(createLocalRegisterAllocator());
-    break;
-  default:
-    assert(0 && "no register allocator selected");
-  }
+  PM.add(createRegisterAllocator());
 
   if (PrintCode)
     PM.add(createMachineFunctionPrinterPass());