reg = <0x1010e000 0x2000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_gates6 0>, <&dclk_lcdc0>, <&clk_gates6 1>, <&sclk_lcdc0>;
- clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "sclk";
+ clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "sclk_lcdc";
rockchip,iommu-enabled = <1>;
status = "disabled";
};
lcdc_dev->hclk = devm_clk_get(lcdc_dev->dev, "hclk_lcdc");
lcdc_dev->aclk = devm_clk_get(lcdc_dev->dev, "aclk_lcdc");
lcdc_dev->dclk = devm_clk_get(lcdc_dev->dev, "dclk_lcdc");
+ lcdc_dev->sclk = devm_clk_get(lcdc_dev->dev, "sclk_lcdc");
// lcdc_dev->pd = devm_clk_get(lcdc_dev->dev, "pd_lcdc");
if ( /*IS_ERR(lcdc_dev->pd) || */ (IS_ERR(lcdc_dev->aclk)) ||
return 0;
if(!enable) {
+ clk_disable_unprepare(lcdc_dev->sclk);
dev_info(lcdc_dev->dev, "%s: disable\n", __func__);
return 0;
}
src = dst_screen->ext_screen;
+ clk_prepare_enable(lcdc_dev->sclk);
lcdc_dev->s_pixclock = calc_sclk(src, dst);
clk_set_rate(lcdc_dev->sclk, lcdc_dev->s_pixclock);