ASoC: fsl_sai: fix the endianess for SAI fifo data.
authorXiubo Li <Li.Xiubo@freescale.com>
Tue, 31 Dec 2013 07:33:22 +0000 (15:33 +0800)
committerMark Brown <broonie@linaro.org>
Tue, 31 Dec 2013 12:23:10 +0000 (12:23 +0000)
Revert the SAI's endianess for fifo data to/from DMA engine.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/fsl/fsl_sai.c

index 2ece14716c676550a294f97b39fb72c97ac0c1e4..5d38a6749b9f2b31d1fbfb88b2bc95645177aac3 100644 (file)
@@ -138,9 +138,9 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
        val_cr4 = sai_readl(sai, sai->base + reg_cr4);
 
        if (sai->big_endian_data)
-               val_cr4 |= FSL_SAI_CR4_MF;
-       else
                val_cr4 &= ~FSL_SAI_CR4_MF;
+       else
+               val_cr4 |= FSL_SAI_CR4_MF;
 
        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
        case SND_SOC_DAIFMT_I2S:
@@ -251,9 +251,9 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 
        val_cr5 &= ~FSL_SAI_CR5_FBT_MASK;
        if (sai->big_endian_data)
-               val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
-       else
                val_cr5 |= FSL_SAI_CR5_FBT(0);
+       else
+               val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
 
        val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
        val_mr = ~0UL - ((1 << channels) - 1);