// Loading an i1 requires special handling.
if (VTIsi1) {
- unsigned ANDReg = createResultReg(&ARM64::GPR32RegClass);
+ MRI.constrainRegClass(ResultReg, &ARM64::GPR32RegClass);
+ unsigned ANDReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ANDReg)
.addReg(ResultReg)
// Storing an i1 requires special handling.
if (VTIsi1) {
- unsigned ANDReg = createResultReg(&ARM64::GPR32RegClass);
+ MRI.constrainRegClass(SrcReg, &ARM64::GPR32RegClass);
+ unsigned ANDReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ANDReg)
.addReg(SrcReg)
CondReg = FastEmitInst_extractsubreg(MVT::i32, CondReg, /*Kill=*/true,
ARM64::sub_32);
- unsigned ANDReg = createResultReg(&ARM64::GPR32RegClass);
+ MRI.constrainRegClass(CondReg, &ARM64::GPR32RegClass);
+ unsigned ANDReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ANDReg)
.addReg(CondReg)
if (FalseReg == 0)
return false;
- unsigned ANDReg = createResultReg(&ARM64::GPR32RegClass);
+
+ MRI.constrainRegClass(CondReg, &ARM64::GPR32RegClass);
+ unsigned ANDReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ANDReg)
.addReg(CondReg)
// Issue an extract_subreg to get the lower 32-bits.
unsigned Reg32 = FastEmitInst_extractsubreg(MVT::i32, SrcReg, /*Kill=*/true,
ARM64::sub_32);
+ MRI.constrainRegClass(Reg32, &ARM64::GPR32RegClass);
// Create the AND instruction which performs the actual truncation.
- unsigned ANDReg = createResultReg(&ARM64::GPR32RegClass);
+ unsigned ANDReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ANDReg)
.addReg(Reg32)
DestVT = MVT::i32;
if (isZExt) {
- unsigned ResultReg = createResultReg(&ARM64::GPR32RegClass);
+ MRI.constrainRegClass(SrcReg, &ARM64::GPR32RegClass);
+ unsigned ResultReg = createResultReg(&ARM64::GPR32spRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(ARM64::ANDWri),
ResultReg)
.addReg(SrcReg)