ste_dma40: move priority to separate field

And keep it low priority by default.

Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 58b3e723b1831a89b7baca629c00c080a95c390d..70e3d409d254114cd21872e97bc8a1f8af641c62 100644 (file)
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -133,7 +133,6 @@ static struct resource dma40_resources[] = {
 /* Default configuration for physcial memcpy */
 struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
        .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE |
-                        STEDMA40_LOW_PRIORITY_CHANNEL |
                         STEDMA40_PCHAN_BASIC_MODE),
        .dir = STEDMA40_MEM_TO_MEM,
 
@@ -150,7 +149,6 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
 /* Default configuration for logical memcpy */
 struct stedma40_chan_cfg dma40_memcpy_conf_log = {
        .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE |
-                        STEDMA40_LOW_PRIORITY_CHANNEL |
                         STEDMA40_LCHAN_SRC_LOG_DST_LOG |
                         STEDMA40_NO_TIM_FOR_LINK),
        .dir = STEDMA40_MEM_TO_MEM,

diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 3dd42551de0419bdac34a195ed95ffc17465ac65..9adcd9b3e293551d3b4a337c2f206c1569fe243f 100644 (file)
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -23,11 +23,6 @@
  * the info structure.
  */
 
-/* Priority */
-#define STEDMA40_INFO_PRIO_TYPE_POS 2
-#define STEDMA40_HIGH_PRIORITY_CHANNEL (0x1 << STEDMA40_INFO_PRIO_TYPE_POS)
-#define STEDMA40_LOW_PRIORITY_CHANNEL (0x2 << STEDMA40_INFO_PRIO_TYPE_POS)
-
 /* Mode  */
 #define STEDMA40_INFO_CH_MODE_TYPE_POS 6
 #define STEDMA40_CHANNEL_IN_PHY_MODE (0x1 << STEDMA40_INFO_CH_MODE_TYPE_POS)
@@ -119,6 +114,7 @@ struct stedma40_half_channel_info {
  *
  * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
  * @channel_type: priority, mode, mode options and interrupt configuration.
+ * @high_priority: true if high-priority
  * @src_dev_type: Src device type
  * @dst_dev_type: Dst device type
  * @src_info: Parameters for dst half channel
@@ -132,6 +128,7 @@ struct stedma40_half_channel_info {
 struct stedma40_chan_cfg {
        enum stedma40_xfer_dir                   dir;
        unsigned int                             channel_type;
+       bool                                     high_priority;
        int                                      src_dev_type;
        int                                      dst_dev_type;
        struct stedma40_half_channel_info        src_info;

diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index 86a306dbe1b4eeb92e4ded94ed15b96c669f6c14..cfc86a56d66fbc917b6c0bcdf5e209310e7e3e1a 100644 (file)
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -108,7 +108,7 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg,
                src |= 1 << D40_SREG_CFG_LOG_GIM_POS;
        }
 
-       if (cfg->channel_type & STEDMA40_HIGH_PRIORITY_CHANNEL) {
+       if (cfg->high_priority) {
                src |= 1 << D40_SREG_CFG_PRI_POS;
                dst |= 1 << D40_SREG_CFG_PRI_POS;
        }