Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208006 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM64/ARM64.td b/lib/Target/ARM64/ARM64.td
index 653f157415831d3df305f903565f30b21d892bd4..c473205f17cad333b8fdf250a445d7efa2b0de9c 100644 (file)
--- a/lib/Target/ARM64/ARM64.td
+++ b/lib/Target/ARM64/ARM64.td
@@ -34,7 +34,7 @@ def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
 
 /// Cyclone has register move instructions which are "free".
 def FeatureZCRegMove : SubtargetFeature<"zcm", "HasZeroCycleRegMove", "true",
-                                        "Has zereo-cycle register moves">;
+                                        "Has zero-cycle register moves">;
 
 /// Cyclone has instructions which zero registers for "free".
 def FeatureZCZeroing : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",