///
std::vector<bool> AliveBlocks;
- /// Kills - List of MachineBasicblock's which contain the last use of this
- /// virtual register (kill it). This also includes the specific instruction
- /// which kills the value.
+ /// Kills - List of MachineInstruction's which are the last use of this
+ /// virtual register (kill it) in their basic block.
///
- std::vector<std::pair<MachineBasicBlock*, MachineInstr*> > Kills;
+ std::vector<MachineInstr*> Kills;
VarInfo() : DefInst(0) {}
/// machine instruction. Returns true if there was a kill
/// corresponding to this instruction, false otherwise.
bool removeKill(MachineInstr *MI) {
- for (std::vector<std::pair<MachineBasicBlock*, MachineInstr*> >::iterator
- i = Kills.begin(); i != Kills.end(); ++i) {
- if (i->second == MI) {
+ for (std::vector<MachineInstr*>::iterator i = Kills.begin(),
+ e = Kills.end(); i != e; ++i)
+ if (*i == MI) {
Kills.erase(i);
return true;
}
- }
return false;
}
};
///
void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
RegistersKilled.insert(std::make_pair(MI, IncomingReg));
- getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MI->getParent(),MI));
+ getVarInfo(IncomingReg).Kills.push_back(MI);
}
/// removeVirtualRegisterKilled - Remove the specified virtual
///
void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
RegistersDead.insert(std::make_pair(MI, IncomingReg));
- getVarInfo(IncomingReg).Kills.push_back(std::make_pair(MI->getParent(),MI));
+ getVarInfo(IncomingReg).Kills.push_back(MI);
}
/// removeVirtualRegisterDead - Remove the specified virtual
// two cases we have to handle here. The most common case is a vreg
// whose lifetime is contained within a basic block. In this case there
// will be a single kill, in MBB, which comes after the definition.
- if (vi.Kills.size() == 1 && vi.Kills[0].first == mbb) {
+ if (vi.Kills.size() == 1 && vi.Kills[0]->getParent() == mbb) {
// FIXME: what about dead vars?
unsigned killIdx;
- if (vi.Kills[0].second != mi)
- killIdx = getUseIndex(getInstructionIndex(vi.Kills[0].second))+1;
+ if (vi.Kills[0] != mi)
+ killIdx = getUseIndex(getInstructionIndex(vi.Kills[0]))+1;
else
killIdx = defIndex+1;
// Finally, this virtual register is live from the start of any killing
// block to the 'use' slot of the killing instruction.
for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) {
- std::pair<MachineBasicBlock*, MachineInstr*> &Kill = vi.Kills[i];
- interval.addRange(getInstructionIndex(Kill.first->begin()),
- getUseIndex(getInstructionIndex(Kill.second))+1);
+ MachineInstr *Kill = vi.Kills[i];
+ interval.addRange(getInstructionIndex(Kill->getParent()->begin()),
+ getUseIndex(getInstructionIndex(Kill))+1);
}
} else {
// Check to see if this basic block is one of the killing blocks. If so,
// remove it...
for (unsigned i = 0, e = VRInfo.Kills.size(); i != e; ++i)
- if (VRInfo.Kills[i].first == MBB) {
+ if (VRInfo.Kills[i]->getParent() == MBB) {
VRInfo.Kills.erase(VRInfo.Kills.begin()+i); // Erase entry
break;
}
void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
MachineInstr *MI) {
// Check to see if this basic block is already a kill block...
- if (!VRInfo.Kills.empty() && VRInfo.Kills.back().first == MBB) {
+ if (!VRInfo.Kills.empty() && VRInfo.Kills.back()->getParent() == MBB) {
// Yes, this register is killed in this basic block already. Increase the
// live range by updating the kill instruction.
- VRInfo.Kills.back().second = MI;
+ VRInfo.Kills.back() = MI;
return;
}
#ifndef NDEBUG
for (unsigned i = 0, e = VRInfo.Kills.size(); i != e; ++i)
- assert(VRInfo.Kills[i].first != MBB && "entry should be at end!");
+ assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!");
#endif
assert(MBB != VRInfo.DefInst->getParent() &&
"Should have kill for defblock!");
// Add a new kill entry for this basic block.
- VRInfo.Kills.push_back(std::make_pair(MI->getParent(), MI));
+ VRInfo.Kills.push_back(MI);
// Update all dominating blocks to mark them known live.
const BasicBlock *BB = MBB->getBasicBlock();
assert(VRInfo.DefInst == 0 && "Variable multiply defined!");
VRInfo.DefInst = MI;
// Defaults to dead
- VRInfo.Kills.push_back(std::make_pair(MI->getParent(), MI));
+ VRInfo.Kills.push_back(MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
AllocatablePhysicalRegisters[MO.getReg()]) {
HandlePhysRegDef(MO.getReg(), MI);
//
for (unsigned i = 0, e = VirtRegInfo.size(); i != e; ++i)
for (unsigned j = 0, e = VirtRegInfo[i].Kills.size(); j != e; ++j) {
- if (VirtRegInfo[i].Kills[j].second == VirtRegInfo[i].DefInst)
- RegistersDead.insert(std::make_pair(VirtRegInfo[i].Kills[j].second,
+ if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst)
+ RegistersDead.insert(std::make_pair(VirtRegInfo[i].Kills[j],
i + MRegisterInfo::FirstVirtualRegister));
else
- RegistersKilled.insert(std::make_pair(VirtRegInfo[i].Kills[j].second,
+ RegistersKilled.insert(std::make_pair(VirtRegInfo[i].Kills[j],
i + MRegisterInfo::FirstVirtualRegister));
}
// Is it killed in this successor?
for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
- if (InRegVI.Kills[i].first == SuccMBB) {
+ if (InRegVI.Kills[i]->getParent() == SuccMBB) {
ValueIsLive = true;
break;
}