ASoC: codec cx2072x will only use mclk 12.288M
authorzhangjun <zhangjun@rock-chips.com>
Tue, 17 Jan 2017 07:53:40 +0000 (15:53 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 18 Jan 2017 06:20:42 +0000 (14:20 +0800)
1. due to cx2072x only support playback samplerate 48K
2. set_clk_rate called from codec side will make the clock
   tree correct, otherwise mclk will be closed from
   i2s_runtime_suspend unexpected

Change-Id: Iaa748bb27635e21f7c2d2997823228cdf7308fe8
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
sound/soc/codecs/cx2072x.c
sound/soc/codecs/cx2072x.h

index 6921ccfcda18696fd1ae99769d074ad9e0eb4db9..da54f1d4a5289ac6c0841a8d97d09c82fede4893 100644 (file)
@@ -1779,9 +1779,17 @@ static int cx2072x_probe(struct snd_soc_codec *codec)
        if (PTR_ERR(cx2072x->mclk_clock) == -EPROBE_DEFER)
                return -EPROBE_DEFER;
 
+       ret = clk_set_rate(cx2072x->mclk_clock, CX2072X_RATES_MCLK);
+       if (ret) {
+               dev_err(codec->dev, "clk_set_rate is fail!\n");
+               return ret;
+       }
+
        ret = clk_prepare_enable(cx2072x->mclk_clock);
-       if (ret)
+       if (ret) {
                dev_err(codec->dev, "clk_prepare_enable is fail!\n");
+               return ret;
+       }
 
        dev_dbg(codec->dev, "codec version: 4.4.20\n");
        regmap_read(cx2072x->regmap, CX2072X_VENDOR_ID, &ven_id);
index 8dcea850ca2cb6e17ce0772ddf3c2251ac636f60..cf3205a1ec08e691b7a345beeb5c1927869b15f0 100644 (file)
@@ -18,6 +18,7 @@
 
 #define CX2072X_RATES          SNDRV_PCM_RATE_8000_192000
 #define CX2072X_RATES_DSP      SNDRV_PCM_RATE_48000
+#define CX2072X_RATES_MCLK     12288000
 
 #define CX2072X_REG_MAX 0x8a3c
 #define AUDDRV_VERSION(major0, major1, minor, build) \