ARM: OMAP2+: gpmc: add DT bindings for OneNAND
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Fri, 25 Jan 2013 12:23:11 +0000 (09:23 -0300)
committerTony Lindgren <tony@atomide.com>
Fri, 1 Feb 2013 22:31:56 +0000 (14:31 -0800)
This patch adds device tree bindings for OMAP OneNAND devices.
Tested on an OMAP3 3430 IGEPv2 board.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Documentation/devicetree/bindings/mtd/gpmc-onenand.txt [new file with mode: 0644]
arch/arm/mach-omap2/gpmc.c

diff --git a/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt b/Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
new file mode 100644 (file)
index 0000000..deec9da
--- /dev/null
@@ -0,0 +1,43 @@
+Device tree bindings for GPMC connected OneNANDs
+
+GPMC connected OneNAND (found on OMAP boards) are represented as child nodes of
+the GPMC controller with a name of "onenand".
+
+All timing relevant properties as well as generic gpmc child properties are
+explained in a separate documents - please refer to
+Documentation/devicetree/bindings/bus/ti-gpmc.txt
+
+Required properties:
+
+ - reg:                        The CS line the peripheral is connected to
+
+Optional properties:
+
+ - dma-channel:                DMA Channel index
+
+For inline partiton table parsing (optional):
+
+ - #address-cells: should be set to 1
+ - #size-cells: should be set to 1
+
+Example for an OMAP3430 board:
+
+       gpmc: gpmc@6e000000 {
+               compatible = "ti,omap3430-gpmc";
+               ti,hwmods = "gpmc";
+               reg = <0x6e000000 0x1000000>;
+               interrupts = <20>;
+               gpmc,num-cs = <8>;
+               gpmc,num-waitpins = <4>;
+               #address-cells = <2>;
+               #size-cells = <1>;
+
+               onenand@0 {
+                       reg = <0 0 0>; /* CS0, offset 0 */
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       /* partitions go here */
+               };
+       };
index 0cf239231d366761d1515631209561496f1cc1ac..1adb2d4496f6ffc095c1bc29fecad8c750ac6326 100644 (file)
@@ -39,6 +39,7 @@
 #include "omap_device.h"
 #include "gpmc.h"
 #include "gpmc-nand.h"
+#include "gpmc-onenand.h"
 
 #define        DEVICE_NAME             "omap-gpmc"
 
@@ -1263,6 +1264,43 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
 }
 #endif
 
+#ifdef CONFIG_MTD_ONENAND
+static int gpmc_probe_onenand_child(struct platform_device *pdev,
+                                struct device_node *child)
+{
+       u32 val;
+       struct omap_onenand_platform_data *gpmc_onenand_data;
+
+       if (of_property_read_u32(child, "reg", &val) < 0) {
+               dev_err(&pdev->dev, "%s has no 'reg' property\n",
+                       child->full_name);
+               return -ENODEV;
+       }
+
+       gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data),
+                                        GFP_KERNEL);
+       if (!gpmc_onenand_data)
+               return -ENOMEM;
+
+       gpmc_onenand_data->cs = val;
+       gpmc_onenand_data->of_node = child;
+       gpmc_onenand_data->dma_channel = -1;
+
+       if (!of_property_read_u32(child, "dma-channel", &val))
+               gpmc_onenand_data->dma_channel = val;
+
+       gpmc_onenand_init(gpmc_onenand_data);
+
+       return 0;
+}
+#else
+static int gpmc_probe_onenand_child(struct platform_device *pdev,
+                                   struct device_node *child)
+{
+       return 0;
+}
+#endif
+
 static int gpmc_probe_dt(struct platform_device *pdev)
 {
        int ret;
@@ -1281,6 +1319,13 @@ static int gpmc_probe_dt(struct platform_device *pdev)
                }
        }
 
+       for_each_node_by_name(child, "onenand") {
+               ret = gpmc_probe_onenand_child(pdev, child);
+               if (ret < 0) {
+                       of_node_put(child);
+                       return ret;
+               }
+       }
        return 0;
 }
 #else