static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_debugss = {
.master = &omap3xxx_l3_main_hwmod,
.slave = &omap3xxx_debugss_hwmod,
- .addr = &omap3xxx_l4_emu_hwmod,
+ .addr = omap3xxx_l4_emu_addrs,
.user = OCP_USER_MPU,
};
/* mpu */
static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
+ { .name = "pmu0", .irq = 54 + OMAP44XX_IRQ_GIC_START },
+ { .name = "pmu1", .irq = 55 + OMAP44XX_IRQ_GIC_START },
{ .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
{ .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
{ .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
*
* Uses OMAP HWMOD framework to create and register an ARM PMU device
* from a list of HWMOD names passed. Currently supports OMAP2, OMAP3
- * and OMAP4430 devices.
+ * and OMAP4 devices.
*/
static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[])
{
* OMAP24xx: mpu
* OMAP3xxx: mpu, debugss
* OMAP4430: l3_main_3, l3_instr, debugss
+ * OMAP4460/70: mpu, debugss
*/
- if (cpu_is_omap24xx()) {
- oh_num = ARRAY_SIZE(omap2_pmu_oh_names);
- oh_names = omap2_pmu_oh_names;
- } else if (cpu_is_omap34xx()) {
- oh_num = ARRAY_SIZE(omap3_pmu_oh_names);
- oh_names = omap3_pmu_oh_names;
- } else if (cpu_is_omap443x()) {
+ if (cpu_is_omap443x()) {
oh_num = ARRAY_SIZE(omap4430_pmu_oh_names);
oh_names = omap4430_pmu_oh_names;
/* XXX Remove the next two lines when CTI driver available */
pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n");
return 0;
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ oh_num = ARRAY_SIZE(omap3_pmu_oh_names);
+ oh_names = omap3_pmu_oh_names;
} else {
- return 0;
+ oh_num = ARRAY_SIZE(omap2_pmu_oh_names);
+ oh_names = omap2_pmu_oh_names;
}
return omap2_init_pmu(oh_num, oh_names);