}
}
+#ifdef CONFIG_ARCH_RK3026
+ ret = ddr_change_freq(nMHz);
+#else
ret = ddr_change_freq_sram(nMHz,ddr_freq_t);
-
+#endif
set_other_cpus_pause(false);
out:
register_reboot_notifier(&ddrfreq_reboot_notifier);
- pr_info("verion 3.1 20130805\n");
+ pr_info("verion 3.1 20130805 1\n");
dprintk(DEBUG_DDR, "normal %luMHz video %luMHz video_low %luMHz dualview %luMHz idle %luMHz suspend %luMHz reboot %luMHz\n",
ddr.normal_rate / MHZ, ddr.video_rate / MHZ, ddr.video_low_rate / MHZ, ddr.dualview_rate / MHZ, ddr.idle_rate / MHZ, ddr.suspend_rate / MHZ, ddr.reboot_rate / MHZ);
#define DDR_TYPE DDR_LPDDR
#endif
-void __sramfunc ddr_suspend(void);
-void __sramfunc ddr_resume(void);
-//void __sramlocalfunc delayus(uint32_t us);
-#if defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK3026)
-uint32_t __sramfunc ddr_change_freq(uint32_t nMHz);
-#else
struct ddr_freq_t {
unsigned long screen_ft_us;
unsigned long long t0;
unsigned long long t1;
unsigned long t2;
};
+
+void __sramfunc ddr_suspend(void);
+void __sramfunc ddr_resume(void);
+//void __sramlocalfunc delayus(uint32_t us);
+#if defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK3026)
+uint32_t __sramfunc ddr_change_freq(uint32_t nMHz);
+#else
uint32_t ddr_change_freq(uint32_t nMHz);
uint32_t __sramfunc ddr_change_freq_sram(uint32_t nMHz , struct ddr_freq_t ddr_freq_t);
#endif