}
}
- if (LBO && match(LBO, m_URem(m_Value(), m_Specific(RHS)))) {
+ Value *V;
+ if (LBO && match(LBO, m_URem(m_Value(V), m_Specific(RHS)))) {
+ bool KnownNonNegative, KnownNegative;
switch (Pred) {
default:
break;
+ case ICmpInst::ICMP_SGT:
+ case ICmpInst::ICMP_SGE:
+ ComputeSignBit(LHS, KnownNonNegative, KnownNegative, TD);
+ if (!KnownNonNegative)
+ break;
+ // fall-through
case ICmpInst::ICMP_EQ:
case ICmpInst::ICMP_UGT:
case ICmpInst::ICMP_UGE:
return ConstantInt::getFalse(RHS->getContext());
+ case ICmpInst::ICMP_SLT:
+ case ICmpInst::ICMP_SLE:
+ ComputeSignBit(LHS, KnownNonNegative, KnownNegative, TD);
+ if (!KnownNonNegative)
+ break;
+ // fall-through
case ICmpInst::ICMP_NE:
case ICmpInst::ICMP_ULT:
case ICmpInst::ICMP_ULE:
}
}
+ if (LBO && match(LBO, m_SRem(m_Value(), m_Specific(RHS)))) {
+ switch (Pred) {
+ default:
+ break;
+ case ICmpInst::ICMP_EQ:
+ case ICmpInst::ICMP_SGT:
+ case ICmpInst::ICMP_SGE:
+ return ConstantInt::getFalse(RHS->getContext());
+ case ICmpInst::ICMP_NE:
+ case ICmpInst::ICMP_SLT:
+ case ICmpInst::ICMP_SLE:
+ return ConstantInt::getTrue(RHS->getContext());
+ }
+ }
+
// If the comparison is with the result of a select instruction, check whether
// comparing with either branch of the select always yields the same value.
if (isa<SelectInst>(LHS) || isa<SelectInst>(RHS))
}
; PR9343 #1
-; CHECK: test39
+; CHECK: @test39
; CHECK %B = icmp eq i32 %X, 0
define i1 @test39(i32 %X, i32 %Y) {
%A = ashr exact i32 %X, %Y
ret i1 %B
}
-; CHECK: test40
+; CHECK: @test40
; CHECK: %B = icmp ne i32 %X, 0
define i1 @test40(i32 %X, i32 %Y) {
%A = lshr exact i32 %X, %Y
%B = icmp ne i32 %A, 0
ret i1 %B
}
+
+; PR9343 #3
+; CHECK: @test41
+; CHECK: ret i1 true
+define i1 @test41(i32 %X, i32 %Y) {
+ %A = urem i32 %X, %Y
+ %B = icmp ugt i32 %Y, %A
+ ret i1 %B
+}
; CHECK: ret i1 %B
}
+define i1 @urem5(i16 %X, i32 %Y) {
+; CHECK: @urem5
+ %A = zext i16 %X to i32
+ %B = urem i32 %A, %Y
+ %C = icmp slt i32 %B, %Y
+ ret i1 %C
+; CHECK: ret i1 true
+}
+
define i1 @srem1(i32 %X) {
; CHECK: @srem1
%A = srem i32 %X, -5
; CHECK: ret i1 false
}
+define i1 @srem2(i32 %X, i32 %Y) {
+; CHECK: @srem2
+ %neg = sub i32 %Y, 0
+ %A = srem i32 %X, %Y
+ %B = icmp slt i32 %A, %neg
+ ret i1 %B
+; CHECK: ret i1 true
+}
+
define i1 @udiv1(i32 %X) {
; CHECK: @udiv1
%A = udiv i32 %X, 1000000