rk292x : usb : exit_phy_hi-z_when_check_dpdm
authorlyz <lyz@rock-chips.com>
Thu, 7 Mar 2013 09:50:02 +0000 (17:50 +0800)
committerlyz <lyz@rock-chips.com>
Thu, 7 Mar 2013 09:50:02 +0000 (17:50 +0800)
drivers/usb/dwc_otg/usbdev_rk2928.c

index 452001c7cd1c70a88f114fc19a59c8ffe4abf0e0..ce07da1d78fea05f2f7159a13a281d393e90d0bf 100755 (executable)
@@ -54,18 +54,20 @@ int dwc_otg_check_dpdm(void)
         }\r
     }\r
     mdelay(105);\r
-    printk("regbase %p 0x%x, otg_phy_con%p, 0x%x\n",\r
-        reg_base, *(reg_base), otg_phy_con1, *otg_phy_con1);\r
+    //printk("regbase %p 0x%x, otg_phy_con%p, 0x%x\n",\r
+    //    reg_base, *(reg_base), otg_phy_con1, *otg_phy_con1);\r
     otg_dctl = (unsigned int * )(reg_base+0x804);\r
     otg_gotgctl = (unsigned int * )(reg_base);\r
     otg_hprt0 = (unsigned int * )(reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET);\r
     if(*otg_gotgctl &(1<<19)){\r
         bus_status = 1;\r
-        *otg_dctl &= ~(0x01<<1);//@lyz exit soft-disconnect mode\r
-        mdelay(50);    // delay about 10ms\r
+        *(unsigned int*)(RK2928_GRF_BASE + GRF_UOC0_CON0) = 0x10000000;//exit usbphy io hi-z state\r
+        *otg_dctl &= ~(0x01<<1);//exit soft-disconnect mode\r
+        mdelay(1);    // delay about 1ms\r
     // check dp,dm\r
-        if((*otg_hprt0 & 0xc00)==0xc00)//@lyz check hprt[11:10] \r
+        if((*otg_hprt0 & 0xc00)==0xc00)//check hprt[11:10] \r
             bus_status = 2;\r
+        *(unsigned int*)(RK2928_GRF_BASE + GRF_UOC0_CON0) = 0x10001000;\r
     }\r
 out:\r
     return bus_status;\r