};
#endif
+static struct resource resource_arm_pmu = {
+ .start = IRQ_ARM_PMU,
+ .end = IRQ_ARM_PMU,
+ .flags = IORESOURCE_IRQ,
+};
+
+struct platform_device device_arm_pmu = {
+ .name = "arm-pmu",
+ .id = ARM_PMU_DEVICE_CPU,
+ .num_resources = 1,
+ .resource = &resource_arm_pmu,
+};
+
static int __init rk30_init_devices(void)
{
rk30_init_dma();
#ifdef CONFIG_RK29_WATCHDOG
platform_device_register(&device_wdt);
#endif
+ platform_device_register(&device_arm_pmu);
+
return 0;
}
arch_initcall(rk30_init_devices);
#define IRQ_PMU_STOP_EXIT_INT RK30XX_IRQ(69)
#define IRQ_OBSERVER_MAINFAULT RK30XX_IRQ(70)
#define IRQ_VPU_OBSRV_MAINFAULT RK30XX_IRQ(71)
-#define IRQ_ARM_PMU 103
#define IRQ_PERI_OBSRV_MAINFAULT RK30XX_IRQ(72)
#define IRQ_VIO1_OBSRV_MAINFAULT RK30XX_IRQ(73)
#define IRQ_VIO0_OBSRV_MAINFAULT RK30XX_IRQ(74)
#define IRQ_DEBUG_UART (IRQ_UART0 + CONFIG_RK_DEBUG_UART)
#endif
+#define IRQ_ARM_PMU RK30XX_IRQ(103)
+
#define NR_GIC_IRQS (5 * 32)
#define NR_GPIO_IRQS (6 * 32)
#define NR_BOARD_IRQS 64