power/reset: brcmstb: Add support for old 65nm chips

The register bit fields are a little different, so add an entry and a
compatible string to accommodate them.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>

diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
index 3c436cc4f35d7069c27c97962bd444dfa25d8b3e..430608ec09f0c7fee0dd226fbbc6da570ca5e4cf 100644 (file)
--- a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
+++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt
@@ -79,7 +79,9 @@ reboot
 Required properties
 
     - compatible
-        The string property "brcm,brcmstb-reboot".
+        The string property "brcm,brcmstb-reboot" for 40nm/28nm chips with
+        the new SYS_CTRL interface, or "brcm,bcm7038-reboot" for 65nm
+        chips with the old SUN_TOP_CTRL interface.
 
     - syscon
         A phandle / integer array that points to the syscon node which describes

diff --git a/drivers/power/reset/brcmstb-reboot.c b/drivers/power/reset/brcmstb-reboot.c
index af5aedf39261683445169058916a4559600835a7..884b53c483c09d4b5081ff697587d2b81f3eae8a 100644 (file)
--- a/drivers/power/reset/brcmstb-reboot.c
+++ b/drivers/power/reset/brcmstb-reboot.c
@@ -88,8 +88,14 @@ static const struct reset_reg_mask reset_bits_40nm = {
        .sw_mstr_rst_mask = BIT(0),
 };
 
+static const struct reset_reg_mask reset_bits_65nm = {
+       .rst_src_en_mask = BIT(3),
+       .sw_mstr_rst_mask = BIT(31),
+};
+
 static const struct of_device_id of_match[] = {
        { .compatible = "brcm,brcmstb-reboot", .data = &reset_bits_40nm },
+       { .compatible = "brcm,bcm7038-reboot", .data = &reset_bits_65nm },
        {},
 };