drm/radeon/kms: minor pm cleanups
authorAlex Deucher <alexdeucher@gmail.com>
Thu, 22 Apr 2010 18:25:19 +0000 (14:25 -0400)
committerDave Airlie <airlied@redhat.com>
Tue, 18 May 2010 08:21:08 +0000 (18:21 +1000)
- remove non_clock_info struct
- track power state misc flags

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_atombios.c
drivers/gpu/drm/radeon/radeon_combios.c
drivers/gpu/drm/radeon/radeon_pm.c

index a6b2aca36b478e3e941141da341be0296786b30a..f10b747024f1b6074dc64a92c7b4331472bce171 100644 (file)
@@ -137,7 +137,7 @@ void r100_get_power_state(struct radeon_device *rdev,
                 rdev->pm.power_state[rdev->pm.requested_power_state_index].
                 clock_info[rdev->pm.requested_clock_mode_index].mclk,
                 rdev->pm.power_state[rdev->pm.requested_power_state_index].
-                non_clock_info.pcie_lanes);
+                pcie_lanes);
 }
 
 void r100_set_power_state(struct radeon_device *rdev)
index cc2797949ee52ed45fbf7f4fc31356e19e6512c3..35a5d4856f465ef88a8aef6caff54f426d7b82b6 100644 (file)
@@ -234,7 +234,7 @@ void r600_get_power_state(struct radeon_device *rdev,
                 rdev->pm.power_state[rdev->pm.requested_power_state_index].
                 clock_info[rdev->pm.requested_clock_mode_index].mclk,
                 rdev->pm.power_state[rdev->pm.requested_power_state_index].
-                non_clock_info.pcie_lanes);
+                pcie_lanes);
 }
 
 void r600_set_power_state(struct radeon_device *rdev)
index b5eccc4094e833c713b8c23057e2568634430d10..b9ad976cfb9c2b2b5bf5422043efd08f5f0b3980 100644 (file)
@@ -654,13 +654,6 @@ struct radeon_voltage {
        u32 voltage;
 };
 
-struct radeon_pm_non_clock_info {
-       /* pcie lanes */
-       int pcie_lanes;
-       /* standardized non-clock flags */
-       u32 flags;
-};
-
 struct radeon_pm_clock_info {
        /* memory clock */
        u32 mclk;
@@ -682,11 +675,11 @@ struct radeon_power_state {
        /* number of valid clock modes in this power state */
        int num_clock_modes;
        struct radeon_pm_clock_info *default_clock_mode;
-       /* non clock info about this state */
-       struct radeon_pm_non_clock_info non_clock_info;
-       bool voltage_drop_active;
        /* standardized state flags */
        u32 flags;
+       u32 misc; /* vbios specific flags */
+       u32 misc2; /* vbios specific flags */
+       int pcie_lanes; /* pcie lanes */
 };
 
 /*
index a0a99b66af8274aa10b0c1688e5bbb04c8fe1bf3..c29ac74a1d20bc75e79352eec232cb0edad84a23 100644 (file)
@@ -1528,7 +1528,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                        if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
                                            (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
                                                continue;
-                                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
+                                       rdev->pm.power_state[state_index].pcie_lanes =
                                                power_info->info.asPowerPlayInfo[i].ucNumPciELanes;
                                        misc = le32_to_cpu(power_info->info.asPowerPlayInfo[i].ulMiscInfo);
                                        if (misc & ATOM_PM_MISCINFO_VOLTAGE_DROP_SUPPORT) {
@@ -1550,6 +1550,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                                        power_info->info.asPowerPlayInfo[i].ucVoltageDropIndex;
                                        }
                                        rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
+                                       rdev->pm.power_state[state_index].misc = misc;
                                        /* order matters! */
                                        if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
                                                rdev->pm.power_state[state_index].type =
@@ -1590,7 +1591,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                        if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
                                            (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
                                                continue;
-                                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
+                                       rdev->pm.power_state[state_index].pcie_lanes =
                                                power_info->info_2.asPowerPlayInfo[i].ucNumPciELanes;
                                        misc = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo);
                                        misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2);
@@ -1613,6 +1614,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                                        power_info->info_2.asPowerPlayInfo[i].ucVoltageDropIndex;
                                        }
                                        rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
+                                       rdev->pm.power_state[state_index].misc = misc;
+                                       rdev->pm.power_state[state_index].misc2 = misc2;
                                        /* order matters! */
                                        if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
                                                rdev->pm.power_state[state_index].type =
@@ -1659,7 +1662,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                        if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
                                            (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
                                                continue;
-                                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
+                                       rdev->pm.power_state[state_index].pcie_lanes =
                                                power_info->info_3.asPowerPlayInfo[i].ucNumPciELanes;
                                        misc = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo);
                                        misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2);
@@ -1688,6 +1691,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                                }
                                        }
                                        rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
+                                       rdev->pm.power_state[state_index].misc = misc;
+                                       rdev->pm.power_state[state_index].misc2 = misc2;
                                        /* order matters! */
                                        if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)
                                                rdev->pm.power_state[state_index].type =
@@ -1730,6 +1735,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                        &rdev->pm.power_state[state_index - 1].clock_info[0];
                                rdev->pm.power_state[state_index].flags &=
                                        ~RADEON_PM_SINGLE_DISPLAY_ONLY;
+                               rdev->pm.power_state[state_index].misc = 0;
+                               rdev->pm.power_state[state_index].misc2 = 0;
                        }
                } else {
                        /* add the i2c bus for thermal/fan chip */
@@ -1852,7 +1859,9 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                if (mode_index) {
                                        misc = le32_to_cpu(non_clock_info->ulCapsAndSettings);
                                        misc2 = le16_to_cpu(non_clock_info->usClassification);
-                                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
+                                       rdev->pm.power_state[state_index].misc = misc;
+                                       rdev->pm.power_state[state_index].misc2 = misc2;
+                                       rdev->pm.power_state[state_index].pcie_lanes =
                                                ((misc & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >>
                                                ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;
                                        switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {
@@ -1902,10 +1911,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                rdev->pm.power_state[state_index].default_clock_mode =
                        &rdev->pm.power_state[state_index].clock_info[0];
                rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
-               if (rdev->asic->get_pcie_lanes)
-                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
-               else
-                       rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
+               rdev->pm.power_state[state_index].pcie_lanes = 16;
                rdev->pm.default_power_state_index = state_index;
                rdev->pm.power_state[state_index].flags = 0;
                state_index++;
index 6a9ec8511261435ac262259ccb1c5dfafa8e5da4..c22344b7fc587efa8cfee44c7c9e1a78fad48053 100644 (file)
@@ -2382,17 +2382,13 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
                        if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) ||
                            (rdev->pm.power_state[state_index].clock_info[0].sclk == 0))
                                goto default_mode;
-                       /* skip overclock modes for now */
-                       if ((rdev->pm.power_state[state_index].clock_info[0].mclk >
-                            rdev->clock.default_mclk + RADEON_MODE_OVERCLOCK_MARGIN) ||
-                           (rdev->pm.power_state[state_index].clock_info[0].sclk >
-                            rdev->clock.default_sclk + RADEON_MODE_OVERCLOCK_MARGIN))
-                               goto default_mode;
                        rdev->pm.power_state[state_index].type =
                                POWER_STATE_TYPE_BATTERY;
                        misc = RBIOS16(offset + 0x5 + 0x0);
                        if (rev > 4)
                                misc2 = RBIOS16(offset + 0x5 + 0xe);
+                       rdev->pm.power_state[state_index].misc = misc;
+                       rdev->pm.power_state[state_index].misc2 = misc2;
                        if (misc & 0x4) {
                                rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO;
                                if (misc & 0x8)
@@ -2439,7 +2435,7 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
                        } else
                                rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
                        if (rev > 6)
-                               rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =
+                               rdev->pm.power_state[state_index].pcie_lanes =
                                        RBIOS8(offset + 0x5 + 0x10);
                        rdev->pm.power_state[state_index].flags = RADEON_PM_SINGLE_DISPLAY_ONLY;
                        state_index++;
@@ -2459,10 +2455,7 @@ default_mode:
        rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
        rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
        rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
-       if (rdev->asic->get_pcie_lanes)
-               rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
-       else
-               rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
+       rdev->pm.power_state[state_index].pcie_lanes = 16;
        rdev->pm.power_state[state_index].flags = 0;
        rdev->pm.default_power_state_index = state_index;
        rdev->pm.num_power_states = state_index + 1;
index 1febb62bdd958f07a1ba088ba9a936111a702e74..87814eb8a1b49c9062aa9c08423307bb43e957d6 100644 (file)
@@ -64,7 +64,7 @@ static void radeon_print_power_mode_info(struct radeon_device *rdev)
                         pm_state_types[rdev->pm.power_state[i].type],
                         is_default ? "(default)" : "");
                if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
-                       DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes);
+                       DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].pcie_lanes);
                if (rdev->pm.power_state[i].flags & RADEON_PM_SINGLE_DISPLAY_ONLY)
                        DRM_INFO("\tSingle display only\n");
                DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes);