iclk: rk3288: set hclk_vio when clk_3288_dclk_lcdc0_set_rate
authordkl <dkl@rock-chips.com>
Thu, 12 Jun 2014 09:59:55 +0000 (17:59 +0800)
committerdkl <dkl@rock-chips.com>
Thu, 12 Jun 2014 10:09:19 +0000 (18:09 +0800)
drivers/clk/rockchip/clk-ops.c

index d80bff0c10d8e70b9a1cb68cf4755e12fd98ab60..3417e27769b0357b7551f35f53d4ddfe908272c3 100644 (file)
@@ -594,6 +594,7 @@ static int clk_3288_dclk_lcdc0_set_rate(struct clk_hw *hw, unsigned long rate,
                unsigned long parent_rate)
 {
        struct clk* aclk_vio0 = clk_get(NULL, "aclk_vio0");
+       struct clk* hclk_vio = clk_get(NULL, "hclk_vio");
        struct clk* parent;
 
        clk_divider_ops.set_rate(hw, rate, parent_rate);
@@ -606,6 +607,7 @@ static int clk_3288_dclk_lcdc0_set_rate(struct clk_hw *hw, unsigned long rate,
 
        clk_set_parent(aclk_vio0, parent);
        clk_set_rate(aclk_vio0, __clk_get_rate(parent));
+       clk_set_rate(hclk_vio, 100*MHZ);
 
        return 0;
 }