Should be using Bcc (average) latency to determine if-conversion threshold, not BL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 38a2fb9b4d09284de897ce06edb036fd02c993f2..345f172deb76652aa19a337043970865a3bd5434 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -296,7 +296,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
     // Use branch latency information to determine if-conversion limits.
     const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
     const InstrItineraryData &InstrItins = Subtarget->getInstrItineraryData();
-    unsigned Latency = InstrItins.getLatency(TII->get(ARM::BL).getSchedClass());
+    unsigned Latency= InstrItins.getLatency(TII->get(ARM::Bcc).getSchedClass());
     if (Latency > 1) {
       setIfCvtBlockSizeLimit(Latency-1);
       if (Latency > 2)